Complementary bootstrapped folded cascode

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jdbakker

Well-known member
Joined
Nov 24, 2005
Messages
1,431
Location
Amsterdam, The Netherlands
Hi all,

I've been tinkering with discrete opamps lately, and Samuel's recent complementary DOA plus another look at Bruno's slides inspired me to come up with this:

complementary_folded_cascode.png


The advantages would include a simplified VAS compared to a fully-complementary architecture, and the bootstrapped cascode should help with CM-induced distortion.

Thoughts? Have I reinvented the wheel here?

JDB.
[still dealing with a nasty flu, so I may well have missed anything glaringly obvious]
 
Will need to think more about the input stage but the topology is for sure limited to follower applications (hint: output voltage range); this struck me before when reading the Putzeys slides. You could go further and boostrap the current mirror as well (see AD797, LT1469 etc.), but you need a very decent output stage for all the benefits.

Samuel
 
Samuel Groner said:
[...] the topology is for sure limited to follower applications (hint: output voltage range)

That only matters for one-stage amplifiers, right? I was planning to use this in a two-stage amp, so the voltage at the output should be constant (and in range).

One further thought: by running the PNP and the NPN pair at different currents (possibly linked to the difference in hFE) the two top current sources could be eliminated, which may help noise-wise. I'll need to think this through, though.

JDB.
 
That only matters for one-stage amplifiers, right?

Sure. IIRC Putzeys showed a one-stage opamp so I concluded that you have the same plan.

A few thoughts and sims later I can't find anything which would speak against your idea--good work!

Samuel
 
I don't spend much time looking inside ICs so take my $.02 with a grain of salt.

Holding the input devices constant voltage eliminates one mechanism, but actually shifts it to the later level translation devices. This is not bad, since it might be easier to manage internally without having to interact with impedance of external input and feedback networks. Of course it depends on the rest of the story and execution, but it looks good (to me). But I've already admitted a weakness for symmetry.

I don't know if there's any problem with biasing the input devices at the edge of saturation. Darlington inputs would buy you some working voltage there but increase noise (voltage). Of course then you could make the raw input transistors constant current too, fwiw.

Whether it is novel I don't know... I think the Pat office (and public) could use a data base and search engine that can identify and search topology variants.

Go for it...

JR

 

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