ATTN: In the coming weeks there will be extended periods of downtime to upgrade our server. I will try to limit the extended downtime days to Saturdays when traffic is lowest, but overall service may be spotty.
What's ur thoughts for a regular dbl sided layout? Split A and D gnds (on both sides of the brd)? Then joined under the dac?
what if your brd had 2, 4, 8 etc dac chips...
Perhaps you could place the chips so that half the board was analog and the other half digital?
or how about keeping them sep all the way bak to the psu?
Instead of R7, I would have placed a small inductance to avoid digital noise to pollute analog ground.
what are you using for your clk source?
as i remember, you can also run the clock through ferrite too but the values have to be spec'd properly.
hope this helps..?
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