SSL 82E42 Analogue Output

Hi,

I look for someone who could explain the operation of the circuits in red box.
They are named "Sample and Hold", but I do not see a control line?
And I do not understand the operation of the two resistors and diode connected at X point .
This point should be 10V, by the resistance of 2K2, and 10V zener.

Thank you for your explanation.
Best Regards,

plimousse said:

Hi,

I look for someone who could explain the operation of the circuits in red box.
They are named "Sample and Hold", but I do not see a control line?
And I do not understand the operation of the two resistors and diode connected at X point .
This point should be 10V, by the resistance of 2K2, and 10V zener.

Thank you for your explanation.
Best Regards,

Click to expand...

Are you sure there's only this battery of S&H connected to the X point?
Seems to me like the ideal control line to be driven by an open-drain output...

Hi,

Thanks for your interest.
I carefully studied the whole schema, but I don't find any other X point.
Normally, this should be a control line,  but if you see something, I would be very grateful.

Unfortunately, the fault board is far from me ... Otherwise, I would try to follow the trace on the pcb ;-)

Cheers,
Pascal

plimousse said:

Hi,

Thanks for your interest.
I carefully studied the whole schema, but I don't find any other X point.
Normally, this should be a control line,  but if you see something, I would be very grateful.

Unfortunately, the fault board is far from me ... Otherwise, I would try to follow the trace on the pcb ;-)

Cheers,
Pascal

Click to expand...

Let me guess an explanation.
The basic S&H function is done by T19b, T20c and C3.
There should not be a need for anything else.
I suspect T20b and associated components perform several other tasks.
I would say R15 & C4 smooth the control voltage (I guess it's the VCA control voltage).
In normal operation Tr3 (P-channel) is held at cut-off because of the positive gate voltage. The 30msec time-constant seems adequate for a 50 Hz refreshment rate.
The voltage at the output of T11 is normally negative, except when a Mute is triggered.
Then Tr1 conducts, making the output of T11 go abruptly positive (about 12V). This positive voltage is transmitted to T20c and via C5 to Tr3's gate, bringing it in conduction, and thus bypassing R15, reducing considerably C4's charging time, which is essential for a fast Mute.
You may call me Madame Soleil if I'm wrong. ;D
Can you describe what goes after R27? I suppose it should go to the VCA drive but also to the Mute trigger.

You are right, after R27 we have VCA, and Mute circuit.
It's also the same for all 64 other output (after 4051 demux ...)

I will simulate your explanation with LTSpice, and keep you inform.
Thanks,

Cheers

plimousse said:

They are named "Sample and Hold", but I do not see a control line?
And I do not understand the operation of the two resistors and diode connected at X point .

Click to expand...

Agreed, the Sample & Hold circuits need a control line to drive the FETs. Like yourself, I cannot find a labelled point X, however, the most likely source of a drive for the S&H is the unlabelled output on IC6-B pin 4. This is the only unlabelled net, but more importantly, its activation is determined by a combination of the externally connected address bus and the "EXEC" (execute) control line. 

The two resistors and diode that are present on the gate node of each of the FETs are to do with DC biasing and controlling of the switching characteristics of the FETs. A detailed explanation is to be found in Chapter 16 of Small Signal Audio Design by Douglas Self.

Thanks Gareth,

I will check that.
Luckily, I have the book you speak

Cheers,