I was more thinking something like this:
Axelite AX5511
This tops out at ~ 24V so we drive a greinacher cascade, capsule bias draws zero actual current once stable, so 1N4148 and 100n X7R ceramic cap's will be plenty. With regulation set to 66V and a tripler cascade we get 66V Bias with 22V at the switching node, all well within safe parameters.
The rest is still about an optimised Schoeps topology.
We only need 5V input for the switcher (note, there is a trick to use more than 5.5V input, drive the inductor from a higher voltage, the chip's Vin pin from a divider with zener clamp), so we can get (say) 32V across our 6.8k Resistors (9.5mA total current), 11V across the output followers for around +26dBu at hard clipping, giving some headroom.
We use the main 22V from the switcher to drive our J-Fet frontend at the usual 0.5mA or so (we have up to ~1mA available.
This incidentally places the J-Fet gate at ~ 5.5V, hence the 66V bias to get actually 60V bias (66V - 5.5V). The input resistance/diode is bootstrapped in this case, no gate resistor, capsule straight to gate.
Our frontend can handle around +20dBu output (bal) before hard clipping. With ~ -32dBu/Pa (20mV @ 94dB) we can theoretically handle 146dB SPL at the point where electronics clip.
Thor