stickjam
Well-known member
Forgive me if this is basic stuff, but I'm getting back into this after a long absence...
A lot of N-JFET amplifier schematics I've seen mirror triode design:
- drain resistor (eg. 10K) to Vdd
- gate resistor (usually 1Meg) to ground
- a source resistor (eg. 4.7K) often in parallel with a cap (50uF) to ground
I've also seen an occasional variation where...
- there's a resistor in series with the source-to-ground cap.
- the gate resistor ties to a low bias voltage (Vdd/11) instead of ground.
What would be the design intent of those variations? Are those variations found or similarly relevant in triode applications?
Thanks
--Bob
A lot of N-JFET amplifier schematics I've seen mirror triode design:
- drain resistor (eg. 10K) to Vdd
- gate resistor (usually 1Meg) to ground
- a source resistor (eg. 4.7K) often in parallel with a cap (50uF) to ground
I've also seen an occasional variation where...
- there's a resistor in series with the source-to-ground cap.
- the gate resistor ties to a low bias voltage (Vdd/11) instead of ground.
What would be the design intent of those variations? Are those variations found or similarly relevant in triode applications?
Thanks
--Bob