Driving currents into protection diodes on CMOS

Followup: a breadboard of one-quarter of one four-band channel now works and looks quite quiet---I can barely see noise over the scope noise at 2mV/div., and that's in a high noise environment and with a large bandwidth. A big relief that it's not starting out life as an oscillator.

I'm about to hook up a selector switch to evaluate switching transients. Of course for the breadboard I didn't include any clamp diodes except for those at the opamp inverting inputs, those in order to have the added capacitance included.

Also, I went back and looked at the On Semi datasheet for the MC14016, and remembered that it is really a kind of 4066 with somewhat higher on resistance. I will have to make a special point of excluding it from the list of permissible substitutions, not because of protection issues so much as the switching transient behavior being terrible.

awesome, I like threads like this. Keep it coming.

Switching transients are very low, less than two millivolts or so peak-to-peak. So I won't have to do anything more complicated such as detecting when the settings are being changed and muting before and after.

I am kind of disappointed lately in the observed offset voltages of TL072 parts. They are within spec, but my recollection is they used to be better. But that could be selective nostalgia.

I'm about to fire up something to get a better noise estimate. I just got an Ap system one (analog domain only) on loan from a friend, but it's going to require quite a tearup of the bench/dining room to accomodate it and its computer. Hey, I can eat standing up in the kitchen!

[quote author="JohnRoberts"]

I wonder if there might be another way to skin that cat? You want a low impedance path for the transfer gate ports themselves, but the power supplies are mostly providing bias voltages. Especially if the TGs are switching a virtual ground input bus (like almost no voltage in use). Perhaps provide a compliance in series with the PS? Something like 100K resistors in series with +V and gnd (-V?), then a 16-18V zener directly across the CMOS chip could keep fault current low and parts happy. There may be some other clever angles applying mitigation to PS side of circuit, but without seeing details not worth more speculation.

JR[/quote]

http://www.intersil.com/data/an/AN532.pdf

Figure 4 on page 2 uses a diode in series with the power supplies as a protection scheme.

[quote author="BradAvenson"]

http://www.intersil.com/data/an/AN532.pdf

Figure 4 on page 2 uses a diode in series with the power supplies as a protection scheme.[/quote]

I was thinking resistors and maybe a zener clamp since CMOS is already near process breakdown voltage. Allowing the input overload to pull up or down on just one rail only could still cause problems. If it dragged both rails up or down to accomodate input it might work unless you have one channel zigging high, while another channel is zagging low.

Of course this causes a related issue with gate control signals needing to follow this floating supply voiltage.

Too much complexity... KISS.

JR

Thanks to all for the continued attention on this. Thanks Brad A. for that Intersil reference---quite apropos. Of course the DI process the author discusses is not the el cheapo 4016.

I haven't heard too much screaming out of China yet about the complexity of the clamp circuitry...keyword being yet. It does feel a bit like the calm before the storm though.

But it's time to clear the breadboard off the bench and move back to some other aspects of the system. I was once again reminded as to how difficult it is to make accurate noise measurements. Things looked pretty nice with a homebrew 20kHz noise bandwidth gain of ~22 dB filter/amp---until I put some additional gain in and got into a more functional region of the ac voltmeter. I also had the generator off but not disconnected, and that accounted for some mysterious low-level hum until discovered.