Not audio related but electronic anyway..

anyone use photovoltaic isolators for HIGH side Nchannel drive? I'm thinking about designing a switch for 500VDC pulses for a input circuit protection test jig.

I'd like for it to be solid state, no relays/contactors/switches(directly inline with the pulse at least..).

Can't use SCRs or TRIACs because I do want this thing to turn off at some point in time.. :green:

Pchannels are out of the question due to the voltage levels.

This leaves only NIGBT or NMOSfets which need to reference a gate voltage to their sources. Those of you who have worked with these understand that you have to drive these to a Vgs of around +5v(preferably+15v) relative to the source to get them to turn on. This means that you have to hit the gate with a HIGHER voltage than that you are supplying to the drain. In this case it would be 500v+15v=515VDC.

The only a few ways to do this.

Charge-pumping the gate but I don't want to have to build a filter to ged rid of the ripple on the gate as I'm pumping it. I also don't want to have to build a pulse generator because this is supposed to be a quick test.. but I digress.

Transformer coupling is the same, I need a continuous pulse train and a filter network. I like simple so this is out as well.

Piezo coupling.. strange and somewhat exotic.. a piezo material transfers the energy as mechanical waves and then converts it back to an electrical pulse train.. again we need pulses..

So that leaves me with photovoltaic couplers. For those who don't know, these are little buggers who create voltage from light. Like little tiny solar cells they take an LED's light and turn it into a voltage, usually around 8-10v. This is enough to charge a gate enough to turn it on. I've used these buggers plenty of times as low side drivers that needed isolation but never on high side or at such voltages.

I plan on referencing the part to the 500VDC so that it sees this voltage as it's "ground" and thus outputs above this voltage to the gate. I'll need to ensure that the gate voltage never gets above 515vdc so there will be a zener protection circuit and a pulldown resistor to 500vdc.

anyone interested so far?

Do you have a need for speed? IIRC the photovoltaics are pretty slow dogs.

There is no need for any serious speed, just bistability and extreme isolation. the trigger will simply be a person pushing a switch, and the length of time is determined by the person pushing the switch!

BUT on second thought, I'm still not referencing the gate to the source... this means immediate FET detonation at these voltages.. I was putting the cart before the horse.. It wasn't until I thought about it and then drew it on my napkin that I realized that I was overlooking the very thing that I was explaining to the audience.. DOH

At least I can say that thinking out loud here on the forum helps me think of all my options... Kinda like a group brainstorming(therapy?) session.

Let me rethink this..

upon thinking about it, I could still use the photovoltaic part, I would reference it to the source of the Nfet and allow it to float up and down with the source as it should always be Vsource + PVIout at the gate regardless of the voltage number.

The gate voltage is always in reference to the source thus I don't even need protection for the gate as the limiting factor will always be the PVI drive capabilities.. but a zener protection circuit could still be used if I wanted to be overly safe..BUT I think with such small current capabilities, the PVI would be overly loaded with the capacitance of the zener, but who knows, that is what prototyping is for! The gate/source resistor will need to be raised to around 5M-10M to keep from loading the PVI down.

I'm just not in a thinking mode today. Maybe I shouldn't be playing around with 500VDC today.. :green:

In all, it's the exact same circuit you would use for a low side switch that you would use for the high side switch.

Now comes the simulations if I can find the right spice data for a PVI.

Oh and Brad, you are indeed correct, the transition time for the PVI/gate is above 1msec(!!!) if you take the miller-cap and shunt-impedence into account.

I guess no one finds my ramblings amusing or insightful.. ? :shock:



:guinness: :guinness:

What's the part you have in mind?

Since very few manufacturers make PVI devices, I suppose it will either be Toshiba or IRF. I'm leaning toward IRF personally since I've not had problems with their parts in all my years.

the part I'm looking at is:

PVI5033


I'm still on the fence about the NFET. I'm leaning towards IGBT instead after looking at the peaks I might encounter driving 500v into a protection circuit. Much lower RDSon than a FET above around 500-600VDC. For a few cents more I can get a serious IGBT and work out the details.

I think the others around the lab are getting nervous when I talk about exploding FETs and electrical fires...

:green:

Wouldn't an optocoupler do this with some peripheral circuitry? They usually have 1-3KV AC isolation.

no, a transistorbased optocoupler acts as a switch, which does indeed isolate, but it does not convert light into voltage as a PhotoVoltaicIsolator does. I would then need a voltage rail that is >5vdc higher than the drain voltage, in this case 500vdc, to trigger the fet into conduction. The circuit I would need to make this work is much too complex.

With the PVI am able to generate 8-10vdc above the cathode pin on the output side of the PVI. If I reference this pin to the source of the Nfet then the output of the PVI then becomes PVIout+ the source voltage thus the gate voltage would roughly be high enough to turn the fet to conduction and stay there. The gate voltage would vary with the source voltage ensuring that the NFET is always on regardless of the voltage measurement referenced to ground.

Thus, the PVI is level shifting AND generating a gate control voltage in one device. This is much more simple.

I'm still wondering if anyone has done this and can offer any insight. What I'm worried about is any slight inductive/capacitive kicks that might happen during switching cycles which might cause the source voltage to rise/drop faster than the PVI can leading to a higher gate voltage that the part can handle for some undetermined short period of time. This isn't usually a problem with low side switches as the source of the NFET is usually "ground" and doesn't move much in relation to the drain.

I would love to use the zener for protection but am afraid of the zener capacitance might interfere.

Gate protection, and for that matter phtovoltaic driver protection, is a legitimate concern. It's true that the zener will slow things down some more, but probably not terribly much. I would look at the safe operating area of the FET while supposing that switching is really slow, and see if you are in trouble. Realize that the voltage swing will be taking place in a fairly small region of the net swing on the gate, so it may be still fairly rapid even when the gate voltage rate-of-change is small.

[quote author="Svart"]

I think the others around the lab are getting nervous when I talk about exploding FETs and electrical fires...

:green:[/quote]

When he was working on some fairly high power switching amps at MDS. a friend said he had come to realize what FET really stood for: Fire Emitting Transistor.

This is interesting for me... I'm working on a project that's similar but different, but more on that later.

IGBT's and MOSFET's both have serious gate capacitance, depends on the size, of course. I've used some of the PV opto/MOSFET combos for channel isolation - sampling a thermocouple in an industrial environment, and they worked well for that. But they are dreadfully slow - several milliseconds to switch. To use a separate PV isolator and MOSFET, you'd need to have a load resistor on the gate, and a zener for protection against fast voltage transients. The Miller effect can really hurt you on high-impedance drive circuits. If you get high DV/DT across a turned-off MOSFET output, you may get a turned-on MOSFET output. I think some of the PV isolators are designed to charge a capacitor then turn on the gate when they get enough charge accumulated so the PV cell doesn't have to charge the gate directly.

I am currently designing an 80kW AC induction motor inverter, and I've got six of these isolated gate drive stages to worry about. 400V bus voltage, 200 amps RMS. Anyways, for this I am using a power-boosted HCPL-316 opto and a DCH010515 DC-DC converter to supply drive to the other side. Of course, I need to charge or discharge somewhere around 20,000pF of gate capacitance in maybe one or two microseconds, so that's some serious current. The peak current I expect is about ten amps to the gate. I need a gate output impedance of maybe two or three ohms or the Miller effect turns everything into a big oscillator and it blows up very convincingly. I've done some learning on a 30kW brushless DC motor drive (200V bus voltage, 240A phase current). Still, the jump to 80kW makes me a bit nervous.

If you can afford some power consumption, you might want to look at this class of part. You'd need a separate DC-DC converter to generate gate drive. If the duty cycle is really low, you could use a PV isolator to supply power to a gate-drive opto, I guess.

-Dale

yeah, why not a dc-dc converter or a 'floating'--500 referenced dc supply?

I don't need to switch any faster than a human can push a momentary switch and there are no pulsing requirements right now. This will be a test where a human sets a voltage level up to 500VDC and pushes a switch to hit a circuit with the desired voltage.

in all honesty the slow action of the FET due to the opto switching speed might help me somewhat. This will be a low current test and the extended transconductance period might make it really easy for me to capture the voltage level vs. breaking point of the circuit with a scope and hand a nice graph over to the director when the time comes..

Thanks for all the insight everyone, let's keep this going while I figure out what corporate really wants from this test as they tend to change their minds halfway through..

Fire Emitting Transistor.

Click to expand...

I LOVE IT!

[quote author="Svart"]
in all honesty the slow action of the FET due to the opto switching speed might help me somewhat. This will be a low current test and the extended transconductance period might make it really easy for me to capture the voltage level vs. breaking point of the circuit with a scope and hand a nice graph over to the director when the time comes..

[/quote]

Sounds like you want something that ramps in a predictable way, which would be a bit more elaborate and might well justify a floating supply. The opto controlling the FET won't be very predictable.

If you were standing off kilovolts photoisolation might be appropriate at some stage, and may still be as part of the system, but given the control desired I think I'd just opt for a filament transformer-based supply.

As I think about it, you are probably right, I was just trying to think up something simple and fairly safe but as I turn this around in my head I keep coming up with more testing scenarios such as the ramping. I could easily do this with a 3525 IC set to 100%duty with a long ramp soft start cycle and just filter the output so that the ripple is negligable or have a variable duty with long ramp softstart. However the gate drive requirements stay the same, I have to drive the Nfet's gate 8-15v over the drain's voltage(500v max) but I could incorporate one of the highside drivers from IRF for this if I have less than 90% dutycycle max, it's a chargepump as well.

I think you're going to do best with a non-switching closed-loop system, essentially a mostly-one-polarity small high voltage power amp. This is because the FET turnon characteristic is so flakey by itself.

So, you could divide down the output voltage on the source by, say, 100:1 with a high Z divider (note well the voltage rating of the resistors). Use an opto to bridge the gap with a little floating gate supply, or just get another smaller FET with the requisite rating (there are some 800V parts used a lot in fluorescent ballasts that might work).

Then a ramp gen and a little error amp down at ground potential. Sounds like a nice project. There may be something out there that does this already but it's probably pretty expensive.

Another approach: do the pulse-width mod with a step-up transformer and rectification on the high voltage side. It would be semi-open-loop but maybe adequate.