Well, the idea is to make something like an active busplane with buffers on it for the clock lines. Every module runs as a slave so that the intra-module clock lines are isolated from the system wide clocklines via buffers.
Could you explain?
Quote from: deuc224 on September 20, 2009, 09:31:30 PMCould you explain? No. Since you compared an evm without psu to a Lavry converter I have nothing on earth to explain.