Gents,
can anyone point me to a way of creating a 3state buffer using BJT's?
Cheers
/R
can anyone point me to a way of creating a 3state buffer using BJT's?
Cheers
/R
JohnRoberts said:How many lines? What kind of load? What are the 3 states (0,1,hi-z or other 3)? Is global control needed?
There are sundry off the shelf 3 state logic ICs, why is discrete desirable?
You can look at logic schematics for guts of old school tri-state buffers for some clues.
JR
Well... you could simplify it somewhat if you just connect your two diodes (D1 and D2) directly to the MPS430 input port, and lose all the transistors, even though they are only $.01, ASSuming one diode drop is read as logic low. Note: you could make diodes out of the transistors if you are trying to use them up.Rochey said:Hello John,
Here's what I've come up with.
Here's some details on the usage. I have a digital switch controller at the moment, using a GPIO on an MSP430 that pulls up to 3v3. Externally, there's a pulldown switch.
On my product, I have two channels of this, and a button that can "link" control of both channels to CH1.
Therefor, when the "link" button is pressed, I need the output from CH1 to trigger to emulate the button on CH2.
I do this by creating a discrete diode logic AND gate using D1 and D2 in the diagram. If either of them = 0, then R1 pulls the anode of D3 to 3.3V.
If both inputs are 1, then the Anode of D3 becomes 3V3 or thereabouts.
If either input is 0, then the Anode of D3 becomes 0V7 or so.
D3 drops any voltage on it's input(anode) by 0.7V. This makes sure that Q1 doesn't start to conduct when the output is supposed to be logic level 0 (but floating at 0.7V).
This has the negative outcome of making the base of Q1 be 2.6V when DATA and ENABLE are high. That's enough to get the transistor biased though
Q2 is a simple inverter, that essentially connects its collector (3V3 through a pullup from the processor) when it's input is high (that is, then Q1 is not saturated)
I'm assuming that when Q2 is not saturated, it's collector looks like a high impedance with respect to ground, and therefor helps the processor input see the 3v3, as the pullup provides.
Any thoughts? Marks out of 10?
Cheers
/R
Rochey said:By the way, the basic Logic version what I want to do is the SN74AHC240.
Enter your email address to join: