ruairioflaherty said:
JohnRoberts said:
Well you've got me confused... If you are using switches, why are you talking about frequency pots?
Sorry John, I'm trying to generalise so that the thread is useful to others, hence the State Variable thread title rather than a specific "My Porter EQ". My build will be entirely on rotary switches but DC offsets is still an issue I want/need to be aware of.
When finished this will be the Ruairi EQ...
DC offsets around the SVF are interesting since there is different AC and DC gain around the multiple feedback paths because of the integrator stages. Further the frequency control pots which look like a divider to the forward signal, to increase the effective resistance seen by the integrator multiplies the DC offset for stable operating point.
you're guessing, aren't you? Significant input bias current could cause DC issues around a SVF.
Well probably one step up from guessing but barely...
- As a starting point Porter specified bipolar inputs so I'm guessing if I can stay at or below the 5532 input bias current spec I should be ok.
- None of the source impedances feeding the opamps in question is too high which is one instance when FET input opamps are a better choice.
Sorry my comment was a little mean...
Porter designed with the best tools he had at the time... In an optimal design using modern parts, you might find different parts optimal for different sockets. For example, the integrator sections need to be unity gain stable parts, while other opamps around the circuit may be operating at higher noise gains and benefit from decompensation (something Porter could manage with size of compensation cap in 5534 (while I'm too lazy to look up what he actually used).
[quote author=Ruairi]
Noise - None of the source impedances are too high so I think the voltage noise is dominant issue here?
[quote author=John]
noise current is multiplied times feedback network and source impedance in parallel, it could matter if design is quiet enough.
[/quote]
That will be tonight's study topic, thank you. These are the pitfalls and tradeoffs I'm trying to understand. In this case I do strive for the design to be as low noise as possible.
For anyone following, I found this video to be helpful to illustrate John's point above (the host calculates current noise starting at 4.33)
http://www.youtube.com/watch?v=W0vfALQ_n54
[/quote]
Sorry I didn't watch your video link.
Noise contributions in a SVF will be different for each section. The wide band noise from the HP section output gets added to the BP section noise and both get a one pole rolloff. The LP section noise which is LPF, goes though the HP stage before adding to the BP output.
Impedances seen by each stage are perhaps similar but different, and changing with frequency settings.
[quote author=Ruairi]
Input offset voltage - Porter deals with all of the offset in one go with a 100uF electrolytic after the filter but obviously if this goes high high we'll get clicking on the switches/pots. I guess I'm safe going for anything that specs at or below 5532 levels.
[quote author=John]
most modern parts should be lower than 553x
[/quote]
Indeed, I don't believe that there's any low enough to avoid using DC blocking electrolytic on the output of the filter so any advantages in newer parts re offset spec are mostly moot?
[/quote]
I don't know, there are some excellent modern parts, and perhaps other ways to avoid DC blocking caps for a very high performance path, while properly applied blocking caps can be pretty low distortion.
inverter sections don't need any input CMRR, other sections do...
I'm working on my understanding of this one, it may have seemed obvious but I never thought of non inverting input use introducing CM elements...
OK, this is a pretty esoteric curve ball, but in SVF the way the opamps are used is quite different between the integrator sections and the others. When designing the circuitry inside an opamp, it is difficult work to ignore common mode voltages present at both inputs. Most opamps are very good but not perfect. For the inverting integrator stages, the + inputs are grounded, so these opamps don't have to worry about CM. In fact they don't even need to be two input opamps, while this would be more of a concern if designing with DOA. In practice, if selecting optimized opamps for each socket, the integrator sections could trade CM for some other characteristic.
[quote author=Ruairi]
Slew - I think anything modern will be fast enough.
[quote author=John]
anything fast enough will do... The LF and probably BP section of SVF will have relaxed slew rate needs, but these days there isn't much cost benefit to using slower parts.
[/quote]
In this case the opamps are more or less cost no object. I do want to stick entirely with modern IC opamps as I don't believe discrete options will bring anything to the table - I don't need huge load driving capability and I'm not looking for mojo/tone/vibe/magical distortions etc.
Thank you,
Ruairi
[/quote]
Agreed no very heavy lifting here, but I could imagine a design using a few different parts.
It is pretty common these days to use canned solutions for input/out like THAT chip sets. Porter invested some effort as I recall in making an output driver that didn't suck. He didn't have the options we do today, to use simple solutions.
I am still dealing with broad strokes here in my answers, but there are many here who can help contribute to this project.
JR