ADC sample rate and LP anti alias question

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PureBasic

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Here's a question I'm asking myself about lower harmonics distortion in ADC and input LP filter.

As you know, signal with frequency above Nyquist Shannon limit (SamplingRate/2) will fold and induce lower harmonics artefacts in the record.

As long as we didn't invented the analog brick-wall filter, even if we filter the input of a 44.1 ADC at 20kHz, a 30kHz signal will still fold. We only have 12 or 24dBu attenuation for a good LP (20kHz LP and 30kHz signal). So, given the >100dBu S/N for good 24 bits ADC, the alias will be non negligible.

I've never thinked about that before. And also higher order filters or Chebychev will overshoot, screw the highs and also generate harmonics higher harmonics (which will fold etc....)

Did somebody measured aliases in this case ?? Is there white paper on it ?
 
Any contemporary ADC is of oversampling nature, i.e. it actually is e.g. a 2.8224 MHz (64 x 44.1 kHz) converter, which then is sample-rate converted down to 44.1 kHz. Thus the analog low-pass filter can be gentle and start above the audio band (typical is perhaps a 2nd order filter at 80 kHz). The steep low-pass filter is just needed in the sample-rate converter, so it can be a digital FIR which is easy to implement.

Samuel
 
There is still an lpf in most adc's... But it'll be set at a far higher frequency. (Some start at300kHz, some at 1Mhz)

There is energy up at those frequencies (from RF and EMI). Its worth calculating the attenuation at those frequencies from your external lpf.


 
PureBasic said:
Here's a question I'm asking myself about lower harmonics distortion in ADC and input LP filter.

As you know, signal with frequency above Nyquist Shannon limit (SamplingRate/2) will fold and induce lower harmonics artefacts in the record.
Artifacts are called "aliases". Not harmonics which are integer fractions, but product of signal folding above and below the sample rate.  Aliases are not harmonics and therefore not very musical.
As long as we didn't invented the analog brick-wall filter, even if we filter the input of a 44.1 ADC at 20kHz, a 30kHz signal will still fold. We only have 12 or 24dBu attenuation for a good LP (20kHz LP and 30kHz signal). So, given the >100dBu S/N for good 24 bits ADC, the alias will be non negligible.
As others have suggested the need for a brick wall anti-alias filter has been relaxed by oversampling, where filter can be placed much higher and above band energy will be much lower. 
I've never thinked about that before. And also higher order filters or Chebychev will overshoot, screw the highs and also generate harmonics higher harmonics (which will fold etc....)
Well executed LPF do not generate distortion, but phase response will be affected if set near audio bandpass.
Did somebody measured aliases in this case ?? Is there white paper on it ?
Pretty much old news...  Google oversampling A/D.

JR
 
Thanks for the answers guys ;)

There is still an lpf in most adc's...
Integrated ? Or on board ?

it actually is e.g. a 2.8224 MHz (64 x 44.1 kHz) converter
There's something I'm not getting. A first order sigma delta modulator will have to run a 185Ghz pulse train to achieve 64 x 16bits 44.1kHz... which is far too high.
Also, lets say the modulator is running at 2.8224MHz, is a 64 bit pulse train enough to create a 16 bits sample ? This is the thing I'm not getting.
 
PureBasic said:
Thanks for the answers guys ;)

There is still an lpf in most adc's...
Integrated ? Or on board ?

Integrated into the ADC as part of the delta-sigma modulator.

it actually is e.g. a 2.8224 MHz (64 x 44.1 kHz) converter
There's something I'm not getting. A first order sigma delta modulator will have to run a 185Ghz pulse train to achieve 64 x 16bits 44.1kHz... which is far too high.
Also, lets say the modulator is running at 2.8224MHz, is a 64 bit pulse train enough to create a 16 bits sample ? This is the thing I'm not getting.

The modulator usually runs at 256, 384, 512 or higher multiples of the sample frequency. For a 48 kHz sample frequency the modulator might run at 24.576 MHz.  So work it out: one bit at 512x, two bits at 256x, and so forth.

(Also, most modern audio converters use a 2nd-order or higher modulator.)

-a
 
LPF is integrated on chip, but it's at a very high frequency, mainly because capacitor is VERY expensive in silicon processes.

It's not 16bits... The modulators are normally one bit (or maximum 5 bit). Those 5 bits are also simultaneous.

So your looking at 48kHz *64, or 48kHz * 128.

Once you have your modulator data (e.g. 1 bit at 64fs), it's then run into a digital decimation filter, that will do a digital low pass filter, and decimate the data from high-data-rate single bit to low-data-rate-multi-bit(e.g. 16 bit).

/R
 
Ok. I've got to look a little bit closer at what happend after the modulator...
I was thinking the output of the ADC was directly the count of logical 1 bit at the output of the mod for 2^n cycles. (n = bit depth).

So for 16 bits => 65536 pulses
at 44.1kHz => 2,8901376GHz
ovsampled 64x => ~185Ghz
result => ... totally nuts microwave modulated ADC
 
PureBasic said:
Ok. I've got to look a little bit closer at what happend after the modulator...
I was thinking the output of the ADC was directly the count of logical 1 bit at the output of the mod for 2^n cycles. (n = bit depth).

So for 16 bits => 65536 pulses
at 44.1kHz => 2,8901376GHz
ovsampled 64x => ~185Ghz
result => ... totally nuts microwave modulated ADC

So... in a 192KHz 24 bits? around ~1.11THz?

Maybe with graphene will work!

Returning to the topic, I should have a closer look to oversampling theory, but it seems to be something like PWM in the other way...

JS
 
Modulator output is a small parallel word (or bit)

Dsd audio is basically the direct output of a one bit modulator (such as the pcm4202).

Taking the 5bit modulator output from the pcm4222 requires a parallel interface.

So no gigahertz needed ;)

Plus, modulator rate and i2s output data rate don't scale together. When you decimate post-modulator, you set your division ratio to give you 48k, 96k and 192k.... All from the same modulator output.
 
A first order sigma delta modulator will have to run a 185 Ghz pulse train to achieve 64 x 16 bits 44.1 kHz...

Noise shaping is the keyword. The noise of a low-bit converter is moved above the audio frequency range, where it is filtered out during sample-rate conversion. Which gives a nice ~20 bit output.

Integrated into the ADC as part of the delta-sigma modulator.
LPF is integrated on chip, but it's at a very high frequency, mainly because capacitor is VERY expensive in silicon processes.

Not sure on this--I'd have thought that the anti-alias filter needs to be ahead of the converter (i.e. at board level). At least essentially all implementations use such. The filters inside the delta-sigma modulator are probably for noise shaping only.

Samuel
 
Samuel,

Almost all modern ADC's have some analog AAF integrated. PCM1807/8 had a 1Mhz AAF, 1802/3 (can't remember which, and I'm on blackberry) has one at 300kHz.

The days of a large front-end opamp and circuitry are rapidly dying for anything lower than 115dB SNR systems.

I competely agree on your noise shaping comment.

/R
 
I see--I thought you were thinking that the noise-shaping filter within the modulator would provide anti-aliasing. I'm just involved with top-notch converters so I haven't seen one with integrated LP ahead of the actual converter.

Samuel
 
The early Philips 14b ADCs used for oversampling 16b CD had the AAF built into the chipset.  These also provided the noise-shaping. 

Some LP IIR digital filters have noise shaping properties.  It's possible the early Philips chipsets weren't actually designed to do this and extensive research followed the discovery of this phenomena.  The Dynamic Duo, Lipshitz & Vanderkooy have several papers on this.

LP IIR digital filters also have "self-dithering" properties.  Its not true dither cos the residue will eventually die out but the benefits are real and very similar.

I found this out designing early large integer IIR & FIR speaker EQ.
 
ricardo said:
LP IIR digital filters also have "self-dithering" properties.  Its not true dither cos the residue will eventually die out but the benefits are real and very similar.

I found this out designing early large integer IIR & FIR speaker EQ.

Care to point out more precisely this phenomenon? I can only think of algorithms that are limited by the bit-width of the platform. ie. truncation on practically all stages of the algorithm on some early DSP chips (or intentionally).

[edit]

Lipsh*tz

lol! the forum doesn't like your dirty talk.
 
Kingston said:
ricardo said:
LP IIR digital filters also have "self-dithering" properties.  Its not true dither cos the residue will eventually die out but the benefits are real and very similar.

I found this out designing early large integer IIR & FIR speaker EQ.

Care to point out more precisely this phenomenon? I can only think of algorithms that are limited by the bit-width of the platform. ie. truncation on practically all stages of the algorithm on some early DSP chips (or intentionally).
http://www.aes.org/e-lib/browse.cfm?elib=5776 On the Dither Performance of High-Order Digital Equalization for Loudspeaker Systems

I pointed this out to them and was rather miffed not to received any acknowledgement.  :mad:

We were carrying out Blind Listening Tests on their speaker EQ box.  Minimum Phase EQ via IIR and switchable Excess Phase compensation via FIR.  To our surprise, of those who could reliably tell the difference, ALL preferred the Excess Phase uncompensated:eek:

It turned out that the Minimum Phase IIR was "self-dithering" but the FIR wasn't.  My true golden pinnae Listening Panel didn't like undithered integer processing .. even on pop.
 

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