Why bias an input transistor this way? WBS M124

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rackmonkey

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Started designing a PCB for a Ward Beck M124 preamp in Eagle, and noticed this input transistor biasing method that I've never seen before. Emitter connected to ground, feedback caps from collector to base and emitter to base with no resistors.  See picture.

What's the goal here? It seems to me the first transistor adds no gain at all. It also wouldn't seem to do anything desirable for the input impedance as well.

I can't find anything out about the input transformer except that it was a custom Hammond with an obscure model number. That normally wouldn't bother me as I could calculate optimum noise impedance and pick something around there (or just brute force based on ear through trying/listening). But I'm wondering if the DCR of the input transformer has a greater effect on the bias in this circuit than it normally would.

It sort of reminds me of grid leak biasing in a tube, which in my experience isn't a very good way to design an input stage for our typical purposes.

Any insight? I tried to simulate it in LT Spice up to the second transistor, but I had to use a generic sub for the 2n3569 as I can't find a spice model for it, nor for the two or three oddball equivalents I found.  A few "sorta" subs with similar hFE and maximum ratings yield no gain at the collector. Then again, looking at the second transistor's configuration, how much gain can you expect to get with an Rc and Re ratio like it has? It seems to feed a balanced output from both the collector and emitter, but...

Odd one.
 

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  • Ward Beck M124 pre schematic.JPG
    Ward Beck M124 pre schematic.JPG
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It is a variation of the standard dc coupled pair. Base/emitter voltage drop acros 82 ohms sets 2nd stage current and hence first stage collector volts and current. First stge usually run at a few volts and maybe 100uA. NFB via transformer secondary ensures good low frequency response.

The CE and BE caps are typical for this types of stage. Look at the Neve BA283 for example.

Cheers

Ian
 
JohnRoberts said:
That is called "common emitter" topology and gives max voltage gain...

JR

I was looking at it as common emitter. But the bias scheme in particular doesn't make sense to me when you look at each of the first two transistors in isolation, which is how I was seeing them.

As a DC coupled pair, it makes sense. I didn't recognize it depicted this way. I should've known better.

Thanks both!
 
Okay, I get the second stage bias now, but I still have a couple of questions.

1) Why would the designer choose not to use a more deterministic biasing scheme on the input transistor? I see a variant of this on a lot of amps from this era.  Why would they choose this approach over, say, voltage divider biasing? What advantages are there to this scheme over others in this situation?

2) How can the the first stage have any gain with no resistors to control the feedback?

Thanks again
 
rackmonkey said:
Okay, I get the second stage bias now, but I still have a couple of questions.

1) Why would the designer choose not to use a more deterministic biasing scheme on the input transistor? I see a variant of this on a lot of amps from this era.  Why would they choose this approach over, say, voltage divider biasing? What advantages are there to this scheme over others in this situation?

2) How can the the first stage have any gain with no resistors to control the feedback?
Biasing through the transformer is very "deterministic" and a perfectly fine way to do it. Why use a voltage divider if you don't need it? A voltage divider would not compensate for drift from temp. changes but bias through the transformer will compensate very nicely even with the emitter grounded.

Feedback is the 15k||1k2 / 82. And with the emitter grounded, open loop gain is going to be high.

It's a very nice circuit actually. Temperature compensated bias, good open loop gain, well defined feedback, minimal parts. What's not to like.
 
Thanks for the explanation. Clear enough on the bias part now, but to clarify, there has to be a jump by the feedback trace over the Q1 emitter ground, right?

As for the feedback, I just thought that the feedback from Q2 went to ground because there's no jump over the ground connection in the diagram. I was referring to the local feedback on Q1, through the 47p cap from the collector.

Still have that question.

And I also figured out my simulation problem. Once I removed the ground connection referenced above, the circuit started working of course.
 
Okay, the whole thing makes more sense now that that ground connection is gone.  I probably should have surmised originially that there couldn't have been a connection there. But I just whipped it up in Spice real quick and used what I saw. Garbage in, garbage out.

I'll run an AC analysis and look carefully at the local feedback on Q1. Still don't see how that works.
 
> there has to be a jump by the feedback trace over the Q1 emitter ground, right?

LOOK at other parts and you see the convention used here.

Crossovers just cross. If there is a connection, it T-butts. If two lines come together on another line, and they connect, the intersections are *staggered* so you know it is not a crossover.

It is not my favorite drawing style. But it is self-consistent, which is the main thing. It avoids the little U-hops. It avoids gap crossovers which may be blurred in the blueprint and smeared.

The "gain" is: voltage on T1 Rd-Gn is transfered to Q1 e-b. Transistor Vbe varies very little. But that causes Q1 C to bob, which Q2 transfers to R5, divides down to R6. To close the loop around Q1, R6 must have the same signal as T1 Rd-Gn. And then Q2 E signal must be higher by the R5 R6 ratio.
 
As PRR was explaining, half (maybe more!) of reading schematics like this is knowing the convention(s) for what connects to what.
rackmonkey said:
I was referring to the local feedback on Q1, through the 47p cap from the collector.
The 47p between base and collector is quite small (though it effectively gets multiplied by the gain, exactly like Miller capacitance), and the 470p between base and emitter is fairly small, so their reactances are high at audio frequencies compared to the other impedances in the circuit, so they're effectively not there for audio. At higher frequencies they have lower impedance and thus more effect, reducing the signal level. These are to eliminate RF signals, that would otherwise be detected by the base-emitter diode and modulate the audio signal.

Try it yourself: capacitive reactance = x(c) = 1 / (2 * pi * f * c),  just remember that f is in hertz, C is in farads, and 'p' is for pico,
1/(10^12).
 
core saturation?  no,

hfe = 100  10 volts / 39K (worse case) = 0.25 ma / 100 = 2.5 microamps base current into 500 turn transformer (typical 600 ohm wind) = 0.0012 amp turns ,  x 1.25 =  .00116 Gilberts,  no biggy,
 
Thanks all. Once I was able to simulate it, this stuff became clear. Secondary DCR of input trans won't have much impact on bias within the range of probables. 10x difference changes it by a few microvolts.  And I shouldn't have ASSumed C-reactance would still allow signal in the audio band back to the base. Especially w/those small values. Duh.

Since these used custom Hammonds in the 850 style case, I was gonna start with 850Gs (1:2) and 850Js (1:5 or 1-8). In all likelihood it was an off the shelf design with an OEM number on it.

I've always been curious about this circuit. I'm planning to have a few boards made. Trying to follow the original layout from the pictures and documentation as closely as possible. I may omit the card connector though. Haven't decided.

If there's any interest by anyone else, I'll post the gerbers and/or Eagle files. I may also try OSH Park for the boards, and if I do, I'll post the layout in the public projects so anyone who wants to just order from there can do so.

If you're not familiar with this one, here's the docs along with some pictures I pulled together into a single PDF.

https://drive.google.com/file/d/1asvUztFDKrGzJ1hQvLEGzoC0N-K203SN/view?usp=sharing

 
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