Soundcraft Spirit Folio 4053 Switching

GroupDIY Audio Forum

Help Support GroupDIY Audio Forum:

This site may earn a commission from merchant affiliate links, including eBay, Amazon, and others.

Newmarket

Well-known member
Joined
Oct 10, 2016
Messages
2,052
Location
Brighton Sussex UK
Anyone understand this switching arrangement using 4053 from Soundcraft Spirit mixers ?
I don't get it !
Cheers
 

Attachments

  • 4053 Snip 01.PNG
    4053 Snip 01.PNG
    81.8 KB · Views: 63
Newmarket said:
Anyone understand this switching arrangement using 4053 from Soundcraft Spirit mixers ?
I don't get it !
Cheers
I don't see the full schematic but 4053 is a CMOS switch based on transfer gate technology, so first you can look up the 4053 data sheet to learn about how the switches are controlled (I could look it up but i don't need to know). FWIW CMOS can't handle the full voltage rails of op amps so it looks like they generate a reduced voltage PS (positive voltage only) for just the CMOS. 

The TG switches are alternately connecting signal to inverting opamp inputs, or not.  I am not very comfortable about running the transfer gates down to ground with AC signals (i generally biased them up mid supply), but I will ASSume this works as drawn.

JR

 
> not very comfortable about running the transfer gates down to ground with AC signals (i generally biased them up mid supply)

4053 is one of the ones with separate logic and analog rails (3 supply pins: Vdd, Vee, Vss). You can run the logic on +7V/0V and work the signal +7V to -7V. (So not a 4066.)
 
PRR said:
> not very comfortable about running the transfer gates down to ground with AC signals (i generally biased them up mid supply)

4053 is one of the ones with separate logic and analog rails (3 supply pins: Vdd, Vee, Vss). You can run the logic on +7V/0V and work the signal +7V to -7V. (So not a 4066.)
Yes but... VEE is tied to ground... So TG could become reverse biased down at negative voltage.  They are summing VE ground referenced currents, and back grounding the input resistors so signals will not swing significantly below 0V.

I am still not comfortable with the design...

I still ASSume it works as drawn, I don't have to like it...  8)

JR

 
The circuit is dropping all of the voltage and switching the current at a virtual earth input. You put a resistor ahead fo the switch to drop the voltage, and make sure that it's always switching into ground - either virtual earth or actual ground. Not sure what the supply voltages are, but I would use symmetric about zero supplies for the 4053 so that it is always seeing a channel voltage between the two rails. Logic drive then becomes annoying, but some varieties of these chips have level shifting circuits so you can run Vdd and Vee as + and - voltages with a normal +3.3 V/ 0V logic drive to the switch.

The biggest problem is that these 4000 series multiplexers are always switch 'break before make', so there's a brief, sometimes only microseconds long gap where the input through the series resistor is not connected to ground, so the input voltage to the multiplexer can float up to its actual value, no longer pinned near ground, and this might far exceed the supply voltage of the CMOS gate and cause it to latch up.  I'm using solid state switches that switch current and not voltage in a similar fashion, but I had to build them out of discrete FETs in order to arrange for overlap of the series and shunt to ground switches, in order to prevent the switch from 'letting go' of the input resistor. I can also arrange for the FET to better match the signal current, improving linearity significantly - those 4000 series switches are very tiny and highly resistive, and typical line level audio signal circuit impedances can handle more capacitance and benefit from a lot less on-resistance.
 
I looked at the schematic more closely, and in the bottom right corner, it shows that they power the 4053 off of Vcc/2 and ground, and not something like Vcc/4 and -Vcc/4. So, the input can go below zero!

I guess the virtual earth is good enough that the voltage stays somewhat close to zero at minimum? I wouldn't do things like that. But, maybe in practice it works...?
 
I first saw that circuit configuration used in an Otari  desk (was Sound Workshop in earlier years), circa 1992.  The Concept One desk was a 40 x 24 configuration and had a central section that handled most of the modules' routing....multitrack busing, pre/posts and sundry other switching.  Hence, there were hundreds of 4053 "SPDT switches" connected into the virtual ground opamp inputs.  I don't recall the DC powering scheme used, but it worked well.

The Concept desk had worse issues....like it was "brain dead" if the required/external 386 DOS/PC with a proprietary interface to the desk (Hovernet they called it) had problems.

The 4053 audio switching always worked fine if the PC was working.

Bri

 
Monte McGuire said:
The circuit is dropping all of the voltage and switching the current at a virtual earth input. You put a resistor ahead fo the switch to drop the voltage, and make sure that it's always switching into ground - either virtual earth or actual ground. Not sure what the supply voltages are, but I would use symmetric about zero supplies for the 4053 so that it is always seeing a channel voltage between the two rails. Logic drive then becomes annoying, but some varieties of these chips have level shifting circuits so you can run Vdd and Vee as + and - voltages with a normal +3.3 V/ 0V logic drive to the switch.
Vee is connected to 0v not negative.
The biggest problem is that these 4000 series multiplexers are always switch 'break before make', so there's a brief, sometimes only microseconds long gap where the input through the series resistor is not connected to ground, so the input voltage to the multiplexer can float up to its actual value, no longer pinned near ground, and this might far exceed the supply voltage of the CMOS gate and cause it to latch up.  I'm using solid state switches that switch current and not voltage in a similar fashion, but I had to build them out of discrete FETs in order to arrange for overlap of the series and shunt to ground switches, in order to prevent the switch from 'letting go' of the input resistor. I can also arrange for the FET to better match the signal current, improving linearity significantly - those 4000 series switches are very tiny and highly resistive, and typical line level audio signal circuit impedances can handle more capacitance and benefit from a lot less on-resistance.

I did not use 4053 but used CMOS transfer gates to switch the entire side of the console between mixdown and monitor (back in the early 80s) with one logic voltage.

I have written about this before right on this forum.. The CMOS TG has sundry gotchas that are all manageable with competent engineering.

I am still not comfortable operating the TG into 0V VE nodes with Vee connected to 0V also... (I always provided volts of bias).

I ASSume it works, the on resistance of the TG could be a little squishy without any negative bias but probably adequate for the application. 

JR
 
Thanks for the replies people. Slight apologies as I posted the question quickly and thought that a schematic extract might be more convenient as a reference than a complete schematic.
As it's relevant I will say that I'm an experienced electronics design engineer with pro audio experience. So I had read the datasheet and understood the 'current switching / VE' mode of operation.
What I wasn't getting was having VEE = 0V.
Since there is always some On-Resistance then there is always going to be some voltage (albeit v small) across the switch and that voltage will sometimes be negative wrt the VE end. And, of course, VE is not perfect. Maybe I'm too concerned about it - I haven't quantified it and I've done a lot of precise dc instrumentation work since my pro-audio days :)
Even if the Switch and VE were perfect I'd still not be too happy about running a 0V 'signal' through a switch with VEE=0V.
But I'm not going to simulate it to check !
I guess my real question was why ? The desk has +/-17V for the opamps so why not derive a positive and negative rail. I guess it's a design decision taking the control voltage span to 0V into account (since that affects Ron level/stability) but it doesn't 'feel right' to me.
re 'Assuming it works' (JR) . Well yes it does work. It's  the Phones/Monitor Switching on Soundcraft Spirit desks (well a lot of them at least) selecting either Mix(or '2-Track') or PFL bus to the Monitor/Phones outputs. So anything coming out on those has come through a 4053 section. I am assuming that the schematics are correct - I haven' disassembled a desk to check :)
I also found a schematic from a later product where a similar scheme is used but the voltages are derived from a resistor chain between +/-17V. VEE is at approximately 0V  but I can't recall if there was a slight negative bias (and it would be subject to resistor tolerance / tempco).

It might be useful to say why I picked up on this. I was using my Spirit Folio F1 desk in testing out a basic compressor unit I picked up via ebay. For convenience / available cables etc I was taking the output via the Monitor / Phones output. I thought I was getting some harshness/distortion on highish level signals. Nothing too analytical here - just me plucking away on a bass guitar. Anyway I took the compressor out of the equation. Still perceived something not quite right. Nothing showing clipping but metering not too comprehensive.It seemed to be the same whether using Mix Bus or PFL and eventually I looked up the schematic and noticed the 4053 configuration.
It might be something else (possibly my ears !) but it caught my attention.
As for the break before make operation causing an issue - I think those switches have diode to rail protection on inputs so should be okay as long as current is limited ?

 
Newmarket said:
Thanks for the replies people. Slight apologies as I posted the question quickly and thought that a schematic extract might be more convenient as a reference than a complete schematic.
As it's relevant I will say that I'm an experienced electronics design engineer with pro audio experience. So I had read the datasheet and understood the 'current switching / VE' mode of operation.
What I wasn't getting was having VEE = 0V.
Since there is always some On-Resistance then there is always going to be some voltage (albeit v small) across the switch and that voltage will sometimes be negative wrt the VE end. And, of course, VE is not perfect. Maybe I'm too concerned about it - I haven't quantified it and I've done a lot of precise dc instrumentation work since my pro-audio days :)
For that design, I don't expect gross misbehavior unless you allow a TG input (or output) to range a diode drop below VEE, or a diode drop above VDD, when CMOS protection diodes will conduct. 
Even if the Switch and VE were perfect I'd still not be too happy about running a 0V 'signal' through a switch with VEE=0V.
But I'm not going to simulate it to check !
I guess my real question was why ? The desk has +/-17V for the opamps so why not derive a positive and negative rail. I guess it's a design decision taking the control voltage span to 0V into account (since that affects Ron level/stability) but it doesn't 'feel right' to me.
agreed, I prefer to drive in the middle of the lane, not hard against the curb.
re 'Assuming it works' (JR) . Well yes it does work. It's  the Phones/Monitor Switching on Soundcraft Spirit desks (well a lot of them at least) selecting either Mix(or '2-Track') or PFL bus to the Monitor/Phones outputs. So anything coming out on those has come through a 4053 section. I am assuming that the schematics are correct - I haven' disassembled a desk to check :)
I also found a schematic from a later product where a similar scheme is used but the voltages are derived from a resistor chain between +/-17V. VEE is at approximately 0V  but I can't recall if there was a slight negative bias (and it would be subject to resistor tolerance / tempco).
I have written about CMOS TG switching on this forum before... Back in the 80s I switched an entire console between mixdown and tracking mode with a single logic control voltage. 

I likewise put the TG in series with a VE inverting input, but wrapped the negative feedback around the TG using the op amp to reduce any TG errors. Of course I used proper symmetrical CMOS supplies above and below the signal 0V.
It might be useful to say why I picked up on this. I was using my Spirit Folio F1 desk in testing out a basic compressor unit I picked up via ebay. For convenience / available cables etc I was taking the output via the Monitor / Phones output. I thought I was getting some harshness/distortion on highish level signals. Nothing too analytical here - just me plucking away on a bass guitar. Anyway I took the compressor out of the equation. Still perceived something not quite right. Nothing showing clipping but metering not too comprehensive.It seemed to be the same whether using Mix Bus or PFL and eventually I looked up the schematic and noticed the 4053 configuration.
It might be something else (possibly my ears !) but it caught my attention.
As for the break before make operation causing an issue - I think those switches have diode to rail protection on inputs so should be okay as long as current is limited ?
The known issues with TG technology can be managed... not to mention some modest charge injection clicks from switching. I suspect the use of Bifets was to avoid voltage steps from switching with bipolar op amp input bias current.

====

To dissect that design further (perhaps too much). A typical inverting opamp stage will exhibit a tiny voltage at the - input, effectively the reciprocal or 1/open loop gain of the op amp output voltage. The TL07x is not known for high Aol at high frequency but it is probably unlikely to generate a full diode drop below VEE at - input from plucking a bass guitar.

It is not out of the question that some component is faulty, a scope and signal generator could provide more answers.  I would expect a square wave to be worst case for largest - input voltage.

I guess it is possible that they relaxed fidelity for a headphone feed, but it is simple enough to generate a proper VEE rail with a couple resistors and capacitor (if that is the weak link). Properly done TGs can be transparent. My several decades old design was below the residual distortion of my test bench. 

JR
 
> not be too happy about running a 0V 'signal' through a switch with VEE=0V.
But I'm not going to simulate it to check !


I would not trust a simulation to know off-envelope behavior. (My sim happily puts 300V on 30V BJTs, and finds reverse conduction in odd corners.)

However if you Read The Datasheet, the Ron is low and *declining* as you approach the rail. Really as good or better than anywhere else. Like John I'd expect trouble at tenths-Volt. But with 10V signals in 10k into 100r FET and <300r summing joint, we are barely there.

"Why?" is a good question. Often unanswerable.
 

Latest posts

Back
Top