J-K flip-flop question

Jaakko,

Before you get bogged down in wiring multiple JK flip-flops, have a look at this schem:

...it's from one of the Elektor books. It uses the CMOS 4028 BCD-to-decimal decoder IC. So each input is effectively 1, 2, 4 and 8 decimally-speaking. You then take the outputs from the 1, 2, 4 and 8 pins respectively. The diode-feedback path forms a latch, which causes the output to hold until the next input select. The ULN2803 IC is a good relay driver, as it has the bac-EMF protection diodes built in.

I know this is only 4 inputs, but with a bit of diode-matrix fun, you could add extra outputs. Gotta go out now, but I'll discuss this later...

Mark

I have a number of schematics for different ways of realizing this function (I was in the switching system business for four years) with gates etc. but unfortunately they are buried away more or less. If I run across them I will at least describe them.

I remember a bit about one that used a priority encoder and an addressable latch, but the details are hazy---this was circa 1987.