A very versatile input stage for SDC mics

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MicUlli

MicUlli

Well-known member
Joined
Mar 18, 2022
Messages
186
Location
Germany
Hello everyone,
as a new member in this forum I want to contribute a very versatile circuit for SDC mics. Comments are welcome ;-)

The circuit was developed for old mics with MBHO capsules like Telefunken TC600 hifi, Dual MC312 and MBC500/MBC540 in order to
make them compatible with phantom power P48. All actually available MBHO capsules work also wery well.

Some technical data:
Supply current 2 mA @ 48 V DC phantom power via 2x 6K8 resistors
A-weighted noise level -120 dBV @ 33 pF capsule capacitance, -123 dBV @ 55 pF capsule capacitance
Polarisation voltage 39,5 V
Maximum output level 2 V rms (with 2x 1K5 AC-load on each signal pin to GND, nonlinear distortion < 0,5 %)
Nonlinear distortion 0,02 % @ 200 mV rms signal output
Input impedance 0,4 pF in parallel to 6 GOhm
Frequency response 20..20000 Hz -0,2 dB at the band edges
Signal amplification -0,3 dB
Common mode rejection ratio >60 dB @ 1 kHz, >44 dB @ 50 Hz

I have buildt 8 prototypes and they perform perfectly. Find attached the circuit diagram and the noise spectrogram
with 33 pF capacitor.

Enjoy!
 

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Unlikely.
In that case the output to pin 2 is (for AC) shorted to ground through C3 (22µF) and the output to pin3 (for AC) would be shorted to ground through 33µF. "Something" must be wrong.
 
No, there is nothing wrong with the circuit. But I have to apologize, I should have explained the tricks in detail.

Lets start with DC analysis (assume all capacitors absent):
With exact P48-supply both signal lines have a DC-voltage of 41,2 V. Every signal line carries 1,01 mA. One part of the current through R6 (ca. 55 uA) is biasing T1 and T2 via R1, R2 and R3. The second part is for the drain current of T1 (ca. 0,95 mA) and feeds T2. T2 gets also supplied by the second signal line via R5. Therefore T2 gets a collector current of ca. 2 mA in sum. The drain-source-voltage of T1 is approx. 1,5 V. Assuming a very low gate leakage current in T1 we get 39,3 V polarisation voltage. R6 and R7 limit inrush currents in case of hot plugging and help for symmetrical signal impedance. D1 saves the circuit in case of undesired signal line shortage to GND.

AC analysis:
The combination of C1, R3, R4 and T2 serves as inductance and is therefore a high impedance source load for the source follower T1. This leads to a very low distortions. The emitter of T2 carries appoximately the same signal as the source of T1 and serves as output driver via C2. C2 also bootstraps the drain of T1 which leads to a nearly constant drain-source-voltage of T1. This is the trick to keep the internal capacitances of T1 virtually inactive and results in an input capacitance of only 0,4 pF. Because of the second bootstrap path for Rg (via R2) the input resistance is also very high (6 GOhm). C4 and C5 suppress RF interferences, C3 is optimised for best impedance symmetry in the audio frequency range.

Some other considerations:
The "hot" signal line is XLR Pin 3 (signal -). XLR Pin 2 (signal +) is inactive. Therefore the circuit has a single ended output, but both signal lines have the same impedance. Positive pressure (gradient) at the mic capsule produces positive signal output (signal + minus signal -).
The symmetrical DC current consumption allows connection to transformer based amplifiers without dangerous magnetising effects.
The circuit also works for electret mic capsules like the highly regarded Primo EM21 and EM23. These capsules benefit from the additional polarisation voltage and deliver approx. 4..5 dB more signal output.

Hope this helped a little bit ;-)
 
MicUlli said:
The circuit also works for electret mic capsules like the highly regarded Primo EM21 and EM23. These capsules benefit from the additional polarisation voltage and deliver approx. 4..5 dB more signal output
Click to expand...
Very interesting, I will test that. Thanks for explanation 👍
 
It is a little like the 012 and Gefell circuits

EDIT forgot to add I like to see things about solid state circuits more than simple triode out tube circuits
 
Last edited:
IF4500 seems to be very well suited, but there may be a drawback because of the poor breakdown voltage rating (20 V). This could cause problems with hot plugging. You have to give it a try. Probably R1 needs to be adjusted for DC current matching of the two signal lines.
Another FET option would be Toshiba 2SK209GR with a breakdown voltage of 50V.
 
MicUlli said:
Common mode rejection ratio >60 dB @ 1 kHz, >44 dB @ 50 Hz
Click to expand...
Thanks for your contribution Ulli.
However, can you say how you measured CMRR?
My simulation shows only ca. 23dB at 50Hz, increasing to 31dB at 1kHz and beyond.
When I saw the schemo, I immediately noticed that the impedance of the legs were not matched.
The simulation shows the impedances of Pin 2 vs. Pin 3 are respectively 30 ohms and 100 ohms at 1kHz and 150 vs. 550 ohms at 50 Hz.
My simulation is based on 5kohms CM impedance (two legs of 10k).
 
RuudNL said:
Unlikely.
In that case the output to pin 2 is (for AC) shorted to ground through C3 (22µF)
Click to expand...
That is correct.
RuudNL said:
and the output to pin3 (for AC) would be shorted to ground through 33µF.
Click to expand...
No. the other side of the 33uF cap goes to the emitter of the PNP, which is the actual output of the combined stage.
 
abbey road d enfer said:
Thanks for your contribution Ulli.
However, can you say how you measured CMRR?
My simulation shows only ca. 23dB at 50Hz, increasing to 31dB at 1kHz and beyond.
When I saw the schemo, I immediately noticed that the impedance of the legs were not matched.
The simulation shows the impedances of Pin 2 vs. Pin 3 are respectively 30 ohms and 100 ohms at 1kHz and 150 vs. 550 ohms at 50 Hz.
My simulation is based on 5kohms CM impedance (two legs of 10k).
Click to expand...
Thanks for your detailled question ;)

I have attached the circuit with the used power supply circuit (it is from a behringer UMC202HD mic input) and also the CMRR graphs for 33, 44 and 55pF Ck.
Perhaps you forgot to assign a value for Ck ?
The impedances of both supply pins are well matched to both 56 Ohms for frequencies >1kHz. At lower values the inductive component of the hot signal line degrades the symmetry a bit.
Here in Germany mains supply is 50 Hz, therefore a tolerable rejection at 50 Hz is desireable.

BR Ulli
 

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OK. I had made my first sim with a different FET. Now I have found a suitable model for this 2SK117. It gives results similar to yours.
However, I would attract your attention to the fact that CMRR is very dependant on the particular FET's parameters. Knowing FET's have a very large tolerance, even within a class, I would not be too confident on the repeatability of performance. It may be non-consequential in many applications, but in an environment with significant EMI/RFI, taht may be an issue.
 
I still don't understand the circuit enough but I think Abbey has a valid point here. In my experience, FETs vary extremely, some are so far off center that they simply don't work everywhere.

Most will be familiar with this, selecting in circuit is a proven antidote. Since you have already built several mics with it Ulli, my question to you. How were your experiences with that? Was selection necessary? If so, with what ratio?
 
abbey road d enfer said:
OK. I had made my first sim with a different FET. Now I have found a suitable model for this 2SK117. It gives results similar to yours.
However, I would attract your attention to the fact that CMRR is very dependant on the particular FET's parameters. Knowing FET's have a very large tolerance, even within a class, I would not be too confident on the repeatability of performance. It may be non-consequential in many applications, but in an environment with significant EMI/RFI, taht may be an issue.
Click to expand...
Hi Abbey,
it is indeed important to know how the jfet influences the circuit performance. In this case the circuit was constructed specially for Toshibas 2SK117GR, very well known for its outstanding noise performance. At this time I have buildt approx. 20 devices with good results. Important for CMRR is the forward transconductance of the jfet at the stated operating current of approx 1mA. I found only small differences . And Vgs @ 1mA Ids varies only from -200 to -450 mV, which is very fine.
Of much more importance is the beta of T2, it should be between 300 and 500. At the beginning of the project only 2 of 10 transistors exceeded the limit.
CMRR is also influenced by the power supply and the mic amplifier circuit. Behringers UMC202HD is nearly worst case :( The common mode input impedance is only 750 Ohms (both lines connected and impedance measured to GND). Other (professional) devices have 4 times higher values.

More info can be found here: https://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.1066.5266&rep=rep1&type=pdf

Maybe that other jfets are well suited, I did not think it over. Parameters to be considered: Idss > 2mA, Ugs0 < 1,5V

BR Ulli
 
2SK117GR has been discontinued for a while now, why build a circuit around it? Where do you source them?
 

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