Discrete OpAmp Design Try

[Samuel Groner]

Hi

I made a first attempt designing a discrete opamp - schemo and closed loop response to be found [removed] (sorry, large pics...). It's basically a 990 variation.

Main use will be line level circuitry (in-/output stage etc.) with gains below 30 dB. My design goals were:

Important features:
* reasonable low noise for low and medium source impedances
* stable at a noise gain of 2 (or lower), independent of source and load
* excellent linearity and time domain performace at gains between 6 dB (or lower) and 24 dB
* easy class A swing into 600 ohm up to clipping
* reasonable high slew-rate (say 15 V/us or more)
* high CMRR
* wide CM voltage range (close to supply rails)
* short circuit proof

Less important features
* low input bias current
* good linearity when working in class AB mode into low loads
* good clipping behaviour (symmetrical and fast recovery)
* good PSRR
* 2520 footprint

As shown, the circuit simulates well down to unity gain. However, I was not yet able to make SPICE eat external models for MJE171/181 and 2SK389, which will replace the transistors Q13/Q14 and Q1/Q2.

Replacing these transistors and going real-world will probably worsen stability; any suggestion for solving this? Avoiding emitter resistors would be nice, altough noise is not the most important feature.

Is the four-transistor current mirror worth it? Would adding emitter resistors to Q5/Q6 help performance?

What about Q7/Q8 and Q11/Q12: do I need to match them?

Thanks for your time!

Samuel

 

[bcarso]

Hi Samuel.

I'm a bit under deadline pressure today but:

You may find a model for the 2SK170, which is close to each half of a 389 (little higher C, gm for the 170). Also bear in mind that the 389 is discontinued by Toshiba, although there is fair stock floating around, and Linear Integrated Systems is working on a sub.

In the meantime you can parallel 5457's to get the requisite gm. Pinchoff will typically be larger magnitude but that won't affect much (small effect on the common-mode-range; lower Vp is better overall for this).

The current mirror is nice when you can assure that the drain voltages of Q1 and Q2 are the same, since now as well all of the paired transistors track in self-heating. However, the Q9-Q10 pair set the voltage at the Q2 drain at about 1.2V below the +rail. Note that this gives you very little voltage swing to work with due to the Q6 collector already being a bit forward-biased w.r.t. the base. This should be fixed, probably. Although with low rate-of-change signals things will work, one strives for a large-signal step response to be able to more or less switch all of the long-tailed pair's tail current for good slew rate---you are driving a feedback integrator with a current (Q9-10 with feedback C the miller cap C1). You are on the verge of saturating Q6 when this happens. At least the input Z at the Q9 base is small---but not as small at high frequencies as one might think since there is a large swing at the Q10 collector. Still in all not bad for audio. You could make R5-6 a bit smaller but eventually this will worsen noise performance.

Again, for most typically encountered signals you most likely won't see a problem due to their low slew rate.

There is no compelling reason to match the current sink transistors. The current is primarily determined by Vbe of Q8-Q11 at the collector current set by the 40k R's. And the temperature of course---these popular pairs have a significant negative tempco of current magnitude. This has been exploited to compensate for the positive gm tempco of a bipolar stage but doesn't make sense for FETs, which have a negative gm tempco. It's not a huge effect though.

Adding emitter R's to Q5-6 would not improve performance imo and just exacerbate your input stage voltage swing issues.

You probably won't need "emitter" resistors except perhaps in that of Q10 since it will give you a bit more voltage off the rail and flexibility a la the 990 for tweaking gain/phase with shunting R-C's. It will reduce output swing slightly and overall low freq loop gain a bit.

If your simulator has the ECG models the 373-374 are subs for the MJE parts.

Brad

 

[Samuel Groner]

Thanks, Brad.

However, the Q9-Q10 pair set the voltage at the Q2 drain at about 1.2V below the +rail. Note that this gives you very little voltage swing to work with due to the Q6 collector already being a bit forward-biased w.r.t. the base. This should be fixed, probably.

It looks like the 990 does have the same problem. How do I fix this?

You could make R5-6 a bit smaller but eventually this will worsen noise performance.

Why does the value of R5/R6 affect noise performance?

You probably won't need "emitter" resistors except perhaps in that of Q10 since it will give you a bit more voltage off the rail and flexibility a la the 990 for tweaking gain/phase with shunting R-C's.

I tried this, but I was not able to squeeze the phase response to a better result. Any ideas on how to perform the design process of the RC-network?

Samuel

 

[bcarso]

What you need is to space Q10 away from the rail a bit. You could put an R in series with a big bypass cap, although that looks inelegant and under superoverload conditions will slow recovery time (I hope a rare event!). Putting a diode in series would reduce the net gm, compared to Q10 alone in about half, which wouldn't be the end of the world. Adjust R7 to restore the desired Q9 emitter current.

R5 and R6 have a thermal noise current. The larger they are the smaller it is, with current noise spectral density root (4kT/R). This has the effect referred to the input of increasing voltage noise (divide by the net gm of the input pair to determine the rough magnitude of the effect). In addition as they get smaller the effect of the voltage noise in the associated bipolars gets more important---a 2nV/root Hz transistor wiggles 180 ohms to produce 11pA/root Hz. The complete circuit analysis is more intricate but that's the general idea. Stick little generators in parallel or series as appropriate to see what happens (pencil and paper or sim).

[parethetically note that what seems like an absurd result for the noise formula, namely the noise current going to infinity as the resistance goes to zero, is not quite as odd when one asks how could I extract this energy---the answer being the best you can do is a matched impedance, driving the voltage developed down proportionally. The circuit involves quite nonzero impedances connected to those resistors so the available noise power is limited.]

As far as the phase response is concerned, that's a major can of worms. Jensen's approach is controversial (see the long 990 thread with comments from various gurus about how the gain-bandwidth product is somewhat misleading, with more distortion-reducing loop gain available in useful configurations at audio frequencies than might be assumed at first blush). There is no arguing (well damn little to be taken seriously) that this is a good sounding op amp and awfully quiet for low source impedances. But there is also the cavil about settling time for step functions and how much of that is audible, to what percent of the step (to 1% error? .001%?). For good settling time you need both fast slewing and very good conformance in the freq domain to open-loop 6dB/oct. rolloff, or more precisely gain inversely proportional to frequency. And how much do we hear overshoot? Audio is more constrained than a sampled-data system, where the A/D can wait until the signal has settled before conversion. In principle we are there all the time.

Note that, even if we achieve the optimal open-loop behavior we can still spoil it by the way we close the loop or load the amp. Conversely, we may be able to judiciously compensate for shortcomings in the open loop response by tweaking our feedback components.

This is in a way an elaborate cop-out, but I hope you realize the subject is a vast one ;-).

 

[Samuel Groner]

Thanks again, Brad!

I was able to improve stability by including the output stage (now with EGC373/374) in the miller loop; do you think this will hold up well in real world? If it worked this way - well, a phase margin of 85° were pretty nice!

With clipping @ low gains, I get polarity inversion; is there an easy fix for this?

BTW, how many 5457 do I need to parallel for getting one side of the 2SK389? I'm just to stupid to understand all this parameters well enough... :? But I will take some EE lectures ASAP! :twisted:

Samuel

 

[bcarso]

Hmmm--polarity inversion. I'll have to look at that some more.

Gm "simply" adds by paralleling. The 5457's are all over the map as FETs will be, but it looks like 2mA/V at 1.8 mA is about what's expected. At the same current one half of a 389 looks about like about 16mA/V. So 8 5457's per side would be about right, except that now you are running them at 1/8 of the current. The gm dependence on current is about as the half-power of drain current. I will leave the solution of the resulting equation as an exercise for the reader ;-). Remark: the accumulated capacitances of the 5457's may make the exercise in sim a bit misleading, unless the input and feedback Z's are low. Another non-obvious effect is the gate and channel capacitances to the shared substrate in the 389, which Toshiba advises you float but can be treated....differently. Again, a small effect for relatively low Z's around it.

Enclosing the output stage in the integrator loop might be fine.

Brad

 

[Samuel Groner]

I will leave the solution of the resulting equation as an exercise for the reader ;-)

Never read such a sentence before... :green:

The higher capacity with the paralleled devices will be an issue; even the capacity of the protection diodes do introduce slight peaking in some configurations (interestingly enough more so with the one which has the output included inside the miller loop and shows better open loop phase margin). Is there a lower-C diode for this?

Samuel

 

[bcarso]

quote: "Is there a lower-C diode for this?"

There are but it shouldn't be that sensitive really. BTW using them at the input back-to-back is not really necessary imo---limited forward gate current is not destructive, and it takes a bunch of volts to have drain-gate breakdown.

It's a different situation for bipolars, where zenering the emitter-base junction results in deterioration.

 

[PRR]

an absurd result for the noise formula, namely the noise current going to infinity as the resistance goes to zero

Not zero, to the 26Ω emitter dynamic resistance (whatever it is at your current).

With the top emitter resistors shorted, Q3 Q4's self-noise flows through Q5 Q6 and hits the node at the tops of Q1 Q2. Meanwhile Source, Q1 and Q2 noise flows up to the same node. As a rough approximation, the Q1 Q2 dymanic source resistance is "about the same" as Q3 Q4 dynamic emitter resistance, so noise about doubles.

At a glance, 180Ω under the ~15Ω emitter dynamic resistances gives nearly-zero excess noise.

If you stuff a resistor between Q1 Q2 sources, as in the common transformerless mike-amp, the "input" gain drops as that resistor is increased, but the current-source noise-gain is steady, and at low gain the output noise is more current-source noise than input noise. The cure is to take a very large voltage drop in large resistors; often 4K7 dropping 5-7 volts. In fact it gets to a point that you omit the current-source transistors and just let the resistors be "current source".

 

[bcarso]

Yes---current sources, given the same available voltage for the whole circuit, are always noisier than resistors.

OTOH except for a variety of reasons, inductors in series with either can be helpful.

I remember when I first started to look (circa 1973) at nuclear science preamp designs and was surprised to see inductors in various input stages---having been conditioned to believe that they were to be avoided due to their "nonideal" character ;-)

 

[Samuel Groner]

Revision 3 is online ([removed]).

Next thing is to read the manual for my simulator and get that 389/170 model working. I found some rather simple models on the net ([removed]); which is the one I should use for a worst case stability analysis? I guess the "J2sk369" is a typo and not a different transistor, is it?

Thanks again, you are really helpful!

Samuel

 

[bcarso]

"I guess the "J2sk369" is a typo and not a different transistor, is it? "

Is that a typo of a typo? (there is a 2SK369, a single device somewhat bigger than the 2SK170).

 

[Samuel Groner]

Is that a typo of a typo?

Copy & Paste doesn't typo! Maybe the "J" is some SPICE-suffix? I see "J2SK170" and "J2sk389" as well...

Samuel

 

[bcarso]

Probably---there is no other part with the "J" that I know of.

 

[PRR]

> Maybe the "J" is some SPICE-suffix?

Yes. It isn't enforced, but by convention J-FET start with J, BJTs start with Q, etc.

I think in some early SPICE, the prefixes were mandatory... current model syntax specifies the base-device in the model.

 

[tk@halmi]

Three bias diodes, oh boy... Have you tried that in real life? When I do that with a few mA through them I get over 150mA standing current in the output transistors. Hopefully, the output transistors can dissipate that.

 

[Samuel Groner]

Have you tried that in real life?

No. Do you have any idea what might cause this effect? My idea was to allow for larger R10/R11.

Samuel

 

[bcarso]

Well, you get, to the extent that the diodes match the output Q Vbe's, one diode worth of drop distributed across the emitter resistors, or in this case about 0.7V/ 9.4ohms, or about 74mA. That is rich bias, and over 1W of quiescent dissipation per transistor, but Samuel said he wanted class A maintained driving stiff loads, which this will provide. Moreover the 3Vbe tempco of the diodes will throttle back at high ambients assuming adequate heatsinking of the output devices, which will be MJE18X ones in the real design, so that's not going to get out of hand.

The quiescent current will depend on the thermal resistance of junction to heatsink/ambient, and so realistically that number has to be figured in. So maybe the output devices have only 0.55V of Vbe at equilibrium temp, for a ~68 degree C rise over ambient, so maybe the current goes to (2.1-1.1)V/9.4ohms, or 106mA.

 

[Samuel Groner]

Well, you get, to the extent that the diodes match the output Q Vbe's, one diode worth of drop distributed across the emitter resistors, or in this case about 0.7V/ 9.4ohms, or about 74mA.

I see that I didn't think about this carefully enough. What happens with two diodes? There is close to zero voltage drop across the emitter resistors, so potentially zero bias as well. Or do we bet on not-matching of diode and Vbe?

Samuel

 

[bcarso]

There is a solution which requires the precise V-I curves of both diodes and Vbe characteristics of the output devices. The current does not go to zero because the Vbe is not the same for different base currents. Even with one diode (shades of the initially incorrect schematic for the Melcor that we've hashed over recently) there will be some tiny current in the output devices.

This is where the ballpark estimates get you started, but the precise behavior requires some more calculation and knowledge of transistor and diode characteristics. Of course, that is what a good simulator will be doing.

For a device like the MJE18X the transconductance is large at 50-100mA---if it were a perfect transistor it would be between about 2 and 4 amps per volt. So you can see where it doesn't take much base voltage change to effect a large current change.

The part that is usually not included automatically in the less powerful simulators is the explicit temperature of the chips. Hence my second-cut approximation assuming that temp has reduced Vbe to 550mV, at that new current, assuming that the MJE18X devices have a reasonable heatsink such that a watt or so raises the chip temp by 70C or so. Note well: chip temp, not heatsink temp. Thus the thermal resistance of junction to case must be included in the calculation.

If the diodes are not getting hot as well then we get towards Tamas' result eventually. What does work to your advantage is the larger tempco of the three diodes against that of the two Vbe's. But this can be taken too far---you don't want the amp to get starved of quiescent current when the ambient gets high. With your rich bias and the likely temp swings in a studio environment there's not going to be a problem, unless the packaging of the final system has been done poorly, or the unit is sitting right above a big tube amp with little ventilation.

Matters get more complex when you intentionally thermally couple the bias diodes to the heatsinks. Doing this is more an issue for high power amps, where the local feedback of the emitter resistors incurs a significant waste of power---so these are made roughly as small as one can get away with, and thermal coupling of bias devices to transistors is mandatory. In your application unless you are space-constrained it should be possible to merely provide decently low thermal resistance-to-ambient dissipators imo.

Brad