Forced Class A opamp

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gyraf

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maybe someone should add it to the meta, along with the other class A opamp threads.

Simple: you just post a reply in the relevant meta, mentioning the URL. Then the meta keeper will (probably) include it on the next cleanup...

Jakob E.
 

Gus

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Something I have been thinking about with the pulldown resistor FCA.

Let say it is a resistor to the - supply bypassing a PNP output.

It is normaly looked at as a bypass of the PNP making the output a NPN EF with a resistor load. Now here is the mess part

A "pure" NPN BJT EF with an emitter resistor has unequal drive the NPN can turn on harder than the resistor can turn off/pull down. So high signal level output might be strange because of unequal current to voltage level drive out from + to - rails

The PNP part is still in the opamp and somewhat active so now the output is kind of like a white follower? The PNP helping at higher - swings when the load needs current?

Is this putting in more distortion of a different type?
 

bcarso

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[quote author="Gus"]Something I have been thinking about with the pulldown resistor FCA.

Let say it is a resistor to the - supply bypassing a PNP output.

It is normaly looked at as a bypass of the PNP making the output a NPN EF with a resistor load. Now here is the mess part

A "pure" NPN BJT EF with an emitter resistor has unequal drive the NPN can turn on harder than the resistor can turn off/pull down. So high signal level output might be strange because of unequal current to voltage level drive out from + to - rails

The PNP part is still in the opamp and somewhat active so now the output is kind of like a white follower? The PNP helping at higher - swings when the load needs current?

Is this putting in more distortion of a different type?[/quote]

When the PNP starts to work you are not in class A any more of course, so the sort of distortions that Self and others discuss for a richly biased class AB shifting into class B come into effect---just not crossover distortion per se. The distortions for the resistor-loaded output would be expected to be even-order due to the asymmetry.

There is the smoother nonlinearity due to the asymmetry, before the resistor can no longer keep the PNP off; this is much easier to alleviate with adequate loop gain as the open-loop components of the distortion are not that rich in high-order harmonics. Put a current source there and you do a bit better. Put an actively driven current source there, and then, driven appropriately, you've finally got your White follower. You could in principle get this drive signal from a current sensor of one sort or another in the positive supply connection to the op amp; although that doesn't sample only the output current, it is pretty close for a lot of IC's. The simple current mirror is going to want at least 1 Vbe drop so this will cut into your output swing a bit.

And you're starting to add a lot of parts. Still, it might make sense for some applications.
 

TedF

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'featherpillow' asks about high/ low order distortions... the distortion created by the output stage is predominantly 3rd order... it's symetrical kicks at the 'crossover' point. It's caused by sudden changes in the open loop/closed loop gain ratio; I always think of it as a momentary instability... that seems to make sense to me, and I can picture it.
Adding the assymetric load to the output holds the output pair in a sort of class A mode for longer, but doesn't address the stability problem that's endemic to most ICs. (this sort of argument makes me sound like a reactionary Hi Fi nut!! Which I most certainly am not!)

The arguments flying around (from gus and bcarso) are interesting, but seem to me like trying to guild a lily... there's not that much wrong with a decent op-amp, and if you really dont like what it does when it's trying to talk to the outside world, then use power amp techniques.
The op-amp with a perfect current source load at its output is still only an op-amp!
 

PRR

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> I believe that sine/square testing is totally inadequate; it's useful only to compare systems in a gross way.

Add Triangle: a sensitive test of both clipping and crossover.

Sin/Sq/Tri tests will confirm "does it work? does it make 7.75V at 20KHz without coming out real bent?"

Bad Sin/Sq/Tri sends you back to the bench. "Good" tests prove little, unless you are making $13 "hi fi systems".

> Operational amplifiers have an unfortunate and disturbing attribute

It isn't as black/white as op-amp versus custom, or chip versus 2N3904. I can build a discrete non-opamp as nasty as a chip.

But chips have huge up-front cost and low-low per-each cost. So the designer stuffs it with as much "performance" as possible, so it can cover "any need". A custom design won't have such overkill. A 2-transistor feedback pair will go a little nuts when pushed to clip/slew, but a 40-transistor amp will go REAL nuts when you ask it to do more than it can manage. (Same with tubes, except cost and stability usually prohibit major-overkill designs.)

> what is the quiescent current for typical IC output stages?

"As low as possible."

In the chip-making racket, "low power" is a virtue. And high current could be a sign of an under-baked (leaky) wafer. And 99% of chip buyers don't care about subtle low level nonlinearity. So they bias just-enough so crossover don't stink, then pass chips that idle a bit low and reject chips that idle a little hot. This is all wrong for small golden audio: a hi-fi preamp, who cares if it eats 2mA or 50mA? The power supply cost is the same either way: a 0.1VA UL/CSA/TUV core is no cheaper than a 10VA core. A 300-amplifier console does put a different slant on power; still we would like "richer" chips than most chip-makers think they should make.

Target idle for several popular chips is probably 0.5mA-1mA, because ~50Ω resistors are a handy size for ballasting and current-limiting and 50mV in the ballast resistor gives low crossover. But chip-makers are more likely to err on the low side, where the audio effects degrade very quickly.

> If you want to put an IC opamp into that condition {low level signals are always handled by one of the halves}, you've got to draw a DC current from the output at least equal to the output stage bias current.

Picking a nit: you only have to pull current in excess of the load current, not the AB stage idle current. (which may be unknowable.)

In practice, most interesting loads want much more current than most chips idle at, so you are going to want an offset current >= idle current.

> question whether the output *always* needs to be class A, or only needs to be class A at low levels.

My mistakes over the years mirror bcarso's observation: a glitch anywhere in the transfer curve will grate badly. If you offset it enough to be clean for small signals, you get a distinct "edge" at higher levels.
 

PRR

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> Can you explain how the nonlinearity mechanism works? Simply the Vbe variation with current or what?

Think Transconductance (Gm). Or rather, emitter resistance, 1/Gm, which is like plate resistance except different device and different pin (still the output pin).

Look at one side and a half-wave. Ignore any discrete emitter resistor. That includes the pure-ohmic resistance of non-perfect contact to the transistor (this is negligible for transistors worked well inside their switching rating).

The gain of the emitter follower is "almost unity". How much less? The emitter resistance splits the output voltage with the load. If the load is 1K and the emitter looks like 100Ω, the output is 1000/(100+1000) or 10/11 or about 0.9.

What is the Gm and emitter resistance? About 30Ω at 1mA, decreasing as current increases. Table:

zero A infiniteΩ
1uA 30,000Ω
10uA 3,000Ω
100uA 300Ω
1mA 30Ω
10mA 3Ω
100mA 0.3Ω

Say we put a 1K load on this. What is the gain?

zero A infiniteΩ zero gain
1uA 30,000Ω 0.03
10uA 3,000Ω 0.25
100uA 300Ω 0.75
1mA 30Ω 0.97
10mA 3Ω 0.997
100mA 0.3Ω 0.9997

So if we could bias at zero current, we'd get zero output. Of course if we drive it hard, some current will flow, and gain becomes greater than nothing. If we reach 1V 1mA output, gain gets to 0.97. There is an infinite difference between a very-very small signal and a 1V signal. Distortion can be said to be infinite. {Or at least: if you put signal in, and no signal comes out, something is totally wrong.)

> sudden changes in the open loop/closed loop gain ratio; I always think of it as a momentary instability... that seems to make sense to me, and I can picture it.

As shown above, it is almost the opposite of instability: a "dead" (zero gain) stage is very stable. It sure is an unexpected situation in a system that you expected to have unity gain! And in a feedback loop, the rest of the amp will bang itself silly trying to blow-through the clogged pipe.

You can NOT "fix this with feedback". Feedback needs gain to work. The stage has zero gain! What tends to happen is that gain in another stage slaps this stage around until signal gets through, but the system is really out of control every time we cross zero current. You can find zero-bias outputs that don't stink, but they always have some grit (or some major complication to mask it).

Say the transistors flowed 1uA at idle. (A Ge transistor might leak more than this; an Si transistor usually won't.) Gain for very small signals is 0.03, while gain for larger signals is over 0.9 and approaching 0.999. That's a 30:1 difference in gain for small or large signals. A 9/11 or 1.22 difference in gain for different parts of the wave is about 5% harmonic distortion, so 30:1 difference is over 100% distortion. (That THD derivation is simplistic; but distortion will be "gross".)

How small can an audio signal be? If we say 10V max and 120dB dynamic range, we have signals as small as 10uV and 10 nanoAmps. Since gain is falling far below 0.999 at transistor current of 100uA, we are choking a LOT of music detail.

If you rig it push-pull, you get zero or very-low gain for small signals, yet it works fine for large signals. The wave is bent on both sides, so it is odd-order distortion. The curvature is "simple" so it is very strongly 3rd harmonic, though some 5th. With multi-tone (music) signals, the intermodulation distortion can be far higher than the 122% estimated for simple harmonic distortion.

One trick with push-pull: at idle, both devices carrying the same current, the emitter resistance is half of the above because both devices act in parallel. When load current exceeds twice idle current, one transistor cuts off and the other is on its own.

Say we idle at 1mA. Output resistance is 30Ω/2 or 15Ω, gain is 0.985. Put 2V in 1K, 2mA in one device, zero mA in the other. Output impedance is now 15Ω||infinity or 15Ω. Ha! We have the same gain for super-small and fairly-large signals! The cancellation is not exact(?) but a heck of a lot better than before. However when we get to 10V 10mA peak, output resistance drops from 15Ω to 3Ω, gain rises from 0.985 to 0.997, a 1.2% shift, maybe a few-tenths distortion.

One practical problem: minor mismatch of bias will give major shift of idle current. Especially with discrete parts (a little easier on a chip where all parts are made the same). We really would like a resistor in the emitter for what tube-fans call "self bias". It turns out this also helps crossover distortion. I won't try to derive this from Torah: pick a number. I like 30. Put 30Ω in each emitter. Bias to 1mA. Now the idle resistance is (30Ω+30Ω)||(30Ω+30Ω) or 30Ω. When we have 1mA in the load, 1.5mA in one device and 0.5mA in the other: (15Ω+30Ω)||(60Ω+30Ω) or 30Ω. At the edge of the A-AB shift, 2mA in one device and zero in the other, it looks like (15Ω+30Ω)||(infinity+30Ω) or 45Ω. And at 10mA, 3Ω+30Ω is 33Ω.

30Ω teeny-signal, 30Ω huge-signal: we have cancelled the 3rd harmonic! (However, that 45Ω at 2mA load current means each side has an "S" bend and we now have some 5th harmonic distortion. No free lunch.)

We also have a small but useful "self-bias" fixed resistor to help tame the extreme tempco of transistor junctions.

Where did that number "30" come from? It is the same as the emitter resistance at the selected bias current. If we bias to 100mA, we use 0.3Ω, as you can rough-confirm by looking at many loudspeaker amps.

Another, equivalent, way to figure this is "emitter resistor should drop 30mV at idle". Some texts will use the number 26mV, derived from Shockley's relation at a nice round temperature. What-ever.

I have a sick boiler so I'll skim. You can find a resistor that cancels the 5th, but the 3rd comes back (in reverse phase) and the 7th comes up. You can find a resistor that minimizes THD, but listening tests quickly show that THD is NOT a good metric when you can vary the proportions of the harmonics at will. The different "optimums" are only a few dozen mV apart. Also tempco is still a problem, and discrete systems are full of ~10mV drifts after you trim them. But the key fact is: go lower than 30mV drop, sound goes sour fast; go over 30mV drop and the THD number may rise a bit but the sound gets better up to the 50mV-100mV range. So you design so the idle NEVER drops below 30mV. There is no real upper limit for sound quality; the limit is usually heat or excess resistor drop at peak output current.

So far I have assumed the bases are driven from a zero-resistance source. This is almost true for the TL071 plan above. Say the 071 output is 100Ω. Divide that by Beta, say 100, it appears as 1Ω at the emitter. Compared to the 30Ω resistor, no big difference. If source resistance is non-neglible, analysis is more complicated. And I do need to fire-up that boiler. 30mV is not the exact-right answer then, but is not wrong; and hi-Z drive does reduce crossover distortion.

> the NPN can turn on harder than the resistor can turn off/pull down. So high signal level output might be strange...

"Class A is like driving with the parking brake on." FWIW: you can get lower THD numbers with a properly set-up AB stage than a "comparable" hard-working class A stage. I repeat that THD numbers are not everything, and especially when blending all possible harmonic distortions in all possible ways.

Going back to the emitter resistance computations, but single-ended: NPN with 10mA CCS pulldown, 10mA load. At +10V we have 20mA in the tranny, at zero V we have 10mA, and to get -10V the tranny has to cut-off (let's say -9V, 1mA still flowing in the tranny). Emitter resistance is 1.5Ω, 3Ω, and 30Ω. Gain is 0.9985, 0.997, 0.97, about a 3% change over the audio waveform. However it is nearly pure 2nd harmonic, and your ear makes so much of that stuff that we don't mind. The other side is that if we do reach cut-off it clips, and to avoid that we have to run BIG heat. An AB stage can idle cool yet deliver huge peaks if needed.
 

bcarso

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Yes, very nice exposition.

I'm reminded of when a grad student wandered into my lab at UCLA years ago. This guy was "to the manor born" and had spent most of his coddled life being told how special and bright he was. He was clearly wanting to socialize a bit (the phrase would be "slumming") and looked around with his nose slightly in the air and said "I guess electronics is pretty easy, isn't it?"

I forget exactly what I said, although it might have been along the lines of, "Oh well, yes, pretty trivial stuff---comparable to stellar models and the like" (whatever it was he was working on).
 

Svart

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oh man, this could turn into another thread just from my experiences..(yes it's so very off topic, sorry)

we recently had an EE grad, 4 credits away from a masters in EE(yes he would find a way to tell you this EVERY time you talked to him.) who was one of those types that no matter what you have done in life, he has done it and done it better..

I had the delight of being put in charge of "bringing him up to speed" with the many things i was doing at the time. So.. I start talking about some of the things I was working on and he was nodding and nodding and nodding until i got to the part where I explain i was working on a MOSFET drive circuit coupled to two Nch MOSFETs and two SiliconControlledRectifiers comprising an H-bridge current amp... I was of course in techspeak mode and just called them fets and SCRs when he stopped me and asked: "FETs... are those a kind of transistor?" I was DUMBFOUNDED to say the least.. so the rest of the conversation goes like this: "MOSFETs?" "yeah uh, MOSFETs, aren't those a transistor or something?" "yes, yes they are a type of transistor.."

so I'm sitting there, obviously having a shocked look on my face because my assistant is sitting at another desk laughing his head off into his arms.. I honestly thought this guy was kidding me and continued a bit before i was stopped again: "SCR? i think i heard about that in class once..." and then searches his memory a bit as I blurted out: " a silicon controlled rectifier? that's simply put a gated diode.." he stands there for a minute and says, "oh yeah we did cover that quickly in class once.. but i think i fell asleep.."


he asked me to continue telling him about my project so i explained how the thing was PWM driven and all the little stuff I did to get everything timed right and so on with the boring details.. when he asked me how PWM works..


so a couple of days later, after bothering some of the other employees, he comes back to me and asks me when i would have a full prototype of this PWM, FET, SCR board.. Of course this was one of the backburner projects that I was working on at the time and gave him the honest answer: "when they give me the time to put my full attention to it." his answer was: " uh yeah, but how long until you have it done?" i said: "uh i can't tell because they have other things they wanted to work on before this project and this one is being worked on in spare time right now.." so he replies: " uh but how am i going to manage this project if i can't give them a timeframe of completion?"

WHOA, wait a minute... this guy has been here all of 3 days and is already trying to muscle in and take credit for the work that MYSELF and my ASSISTANT have worked on?!?!

Needless to say I go to MY boss whom i ask bluntly, " is he now managing MY department?" the boss looks at me with total suprise and replies: " uh no, he just got here and his job is to organize the PCB files and schematics.."

so now i see how this guy got all those things on his resume and how his various Final exam projects in college really got done..

needless to say that he didn't have a job much longer after that due to his attitude and lack of work. they had actually logged his computer usage and found that he was day trading more than actually working..


I may not be a first class engineer, or a real engineer by anymeans but at least i take pride in my work..

:shock:
 

chrissugar

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WOW! I was in vacation and the thread became quite big.
Thank you PRR for the great post. As always a pleasure to read.

chrissugar
 

TedF

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Just re-read the PRR post of 1st Sept.......

All you can really say is .... Yep......

Are there any conclusions? No, I don't think there are; it's horses for courses, I like my predominantly class A chips for most things... I will parallel them up sometimes to drive nastier loads, but the fact remains, it's the load on the end that determines the quality (or the fool on the faders that ruins the record.)

Maybe that was a conclusion. :wink:
 

tv

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The easiest/cleanest "practical" way would be to use "constant-current diodes".
 

jackies

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Except those "current-constant diodes" cost more than most opamps.
So the only "practical" way would be resistors. Or, possibly "resistor+fet"?
 

pstamler

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Well, resistors are the cheapest way; that what Focusrite does in their Platinum line. But you can make a respectable real constant-current sink from a general-purpose transistor, two resistors and two diodes (or one LED).

Peace,
Paiul
 

tv

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The cost ratio for diodes depends on how costly opamps you have in your device... but in a tight circuit, a resistor or a diode is the only viable solution imho.

The only option left (for a tight, cramped device) would be to find and measure jfets that would have the required Idss and use them in the circuit with their gate and sources connected (like a ccs diode..). This could be cheap, but imho you would have to have a big bag of just-the-right fets and then select the truly-really-good-ones out of the bag.

Edit: ah, here it is - an easy read explaining basics
http://tangentsoft.net/audio/opamp-bias.html
 

tomgam1

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Hi all,
I referenced this thread when doing some research for a future project, and thought I'd report my experience.
A few (quick) measurements with my analyzer revealed that the class A forcing (resistor tied to negative rail) does seem to alleviate distortion artifacts in the case of the older TL071. It doesn't seem to make any difference at all with newer devices (I tried the OPA1611 and LT1115). Attached the FFT plots for the TL071 (class AB and class A operation). Opamp set up in non-inverting configuration, 20dB of gain, 10k load. If I have more time I'll try to characterize this with more accuracy.
Regards,
Tommaso
 

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Winston OBoogie

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Interesting results, thanks for the uploads.
IC designers have learned a few tricks to dramatically reduce output stage switching distortions since the TL072 came out.

It may be that a lot of the newer op-amps you're testing run class B all the time. Correctly biased class B will have less distortion than AB.


Edit: clarification. I meant to say that newer op-amps might run in class B all the time WITH A LOAD. I'm not suggesting these output stages have zero standing current with no load.

Optimum bias was discussed in a paper by Barney Oliver of HP in the 1970's. His app note basically says that the external RE should equal the internal re' of the output devices. He states this as being related to the figure of 26mV/I. In practice, I find that his 26mV is just a guide and that the optimum in situ may err either side of that value.
 
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