Twenty Log
Well-known member
Uhg... It's yet another discrete ADC design, currently under way here... So far, the concentration has been on the quantizer and feedback DAC for the delta-sigma modulator... H(s) design to ensue later, but am worried that the quantizer is sampling extremely fast (absurd OSR) and that limitations in the performance would be the front end... Proposed as a CIFF design...
first-time bring-up was a little rough (shown), but eventually tuned in nicely after a minute or so of tweaking...
Cheers!
first-time bring-up was a little rough (shown), but eventually tuned in nicely after a minute or so of tweaking...
Cheers!