7x7 relay routing matrix temporarily shorts 2 virtual grounds

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Twenty Log

Well-known member
Joined
Jan 7, 2010
Messages
213
Location
New Hampshire, USA
Howdy Folks,

I have a simple 7x7 relay routing matrix (7 inputs route to 7 outputs; re-assignable any input to any output).  One issue (maybe?) is that during the switching to reroute audio from one input to a different output, it is possible that 2 output op-amps can be shorted to the same signal, if there is a make-before-break or a relay failure (stuck relay).

I was originally (on paper) putting lots of precision resistors on the routing output of EVERY relay and essentially turning the matrix essentially into a mixer that should normally have normally only one channel mixed per "bus", but am looking to only have a common resistor at the Input of each bus in the matrix only to reduce parts count...

Basically the two opamps shorted together in the reduced parts count scenario are 2 parallel current-to-voltage converters (transimpedance) amplifiers with their "virtual ground" connection shorted together with a common resistor on the input as fed from the matrix...

I wonder if the error offset voltages and currents inherent in opamps will make the two opamps fight each other through the virtual ground when shorted at their virtual grounds (with single common resistor as the input resistor to the shorted pair)... Will this cause oscillation (note, I have omitted feedback caps and other protection circuitry)?

Here is a picture (worth 1k words?) of both scenarios... I like the reduced parts count, as when this matrix becomes a 7 x 7 matrix it gets hairy (especially when balanced topology used)....

Any thoughts anyone?

Cheers,
-chris

 

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As I read it, 1mV offset will be multiplied by 10K/0=infinity, or say 10K/1=10,000, and slam the outputs to large DC voltage, typically slammed to the rail. In that case, no oscillation is possible, but you will be plucking voice-coils out of the far wall.

Why inverters? Wire as unity gain buffers. If one source is fed, it does the obvious thing. If two sources are fed via resistors, they are mixed, no harm done and the unwanted mixing leads you to the problem.

A question is: one resistor per source (7) or one per crosspoint (49)? I guess it depends how many unwanted shorts you expect to get and how much income you lose if signals pop out at unexpected places. I'll say "49" but don't ask me to solder the extra 82 leads.

Is there even a need for amps at all? Gee, we used to use passive patchbays and signals made their way through.
 
Or use small(?) resistors in series with each virtual ground input?

Nothing is without consequence, so these extra Rs could degrade crosstalk between buses or sources depending on how used.

JR
 
Hey Guys... Thanks for being the sounding wall... Indeed it is interesting that a simple circuit can provide a conundrum, but that's what makes our interests, well, so interesting...

I was originally looking at it as two parallel current to voltage converters (but I could be wrong), and the single resistor per bus which would be 10k into "virtual ground" (this assumes the virtual ground is maintained), say, for example at the +15 volt rail going into the two parallel C-to-V converters... 15V over 10kOhms to virtual ground would be 1.5mA split into the two C-to-V converters (so "approximately" 750uA-ish into each C-to-V depending on error offsets keeping the virtual ground, well, ground)...  So 750uA into a single C-to-V with 10k feedback resistor would be 7.5V... Again don't know how the errors would perturb the virtual node with both opamps fighting to get it to "0V"... It may just be reflected in the output as a standard error offset for each C-to-V?

Again, I could be missing something... I was thinking of trying it in a simulator, but am not able to get in front of it for at least another week or two...  I could fake out some of the possible offset error sources I suppose...

The inverters are so as not to incur crossover distortion on the front-end and are part of other larger circuits that invert anyway on the balanced output.  The balanced circuits are always inverting on each phase and can be treated as if they were inverting opamps.  Regardless, of course, swapping the wires on the output XLR would turn the inverter into a non-inverter...

The resistors are expensive precision resistors as this would be for my mastering suite here. These inverters are part of a larger and generic M-S circuit on some of the busses...  Putting other small resistors in there may be an option and would need to be also put in the feedback paths... I suppose the gain would need to be studied structure of this circuit needs to be studied a little closer under the relay fault or temporary conditions further...

Definitely an interesting notion here...  Thanks indeed for the replies so far..  it's getting me to thinkin' some here...

Best Thanks,
-chris
 
> thinking of trying it in a simulator

Here's the sim.

My op-amps are "perfect", yours are not, so I threw milliVolt batteries in to simulate offset voltage. To avoid impossible answers, I assumed 1-ohm relay contact resistance.

You can get smaller offset; you can't get dead-zero offset.

OTOH, relay resistance is likely to be less than 1 ohm.
 

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I use the 100 ohm or so build in resistance in similar situations, solves some RF susceptibility issues,
doesn't affect the audio, can be trimmed out for gain, lot's of benefits.

Why not hang a small cap across the relay coil to delay turn-off?

You aren't doing super time critical switching.

Unless I'm missing something.
 
Indeed... this is what I was afraid of, hence the initial inquiry.....  It would seem that the simple 10k resistor on the input is not a true (high impedance) current source to push current into the virtual node amongst other things overcoming errors in the opamps (vos, ios, ib etc.).  Thank you everyone for taking a look and bouncing some ideas.  The good news is that I already have the multi resistor solution in the CAD system (thank you step and repeat)...

Indeed, the switching time is not critical, I was just trying to reduce parts count but the tradeoff is possible temporary shorting of busses, when the microprocessor flips the relays perhaps without time delay (quasi race condition with bounce times)...  as shown in PRR's simulation with "non-ideal" opamps... Or if 20 years later, there is a relay failure, the same fault can happen....

Bottom line if resistors on each relay entrance to the bus, then it is a mixer, and belt-and-suspenders style of circuit design (at some added expense)...  However, being a mixer could have some interesting potential for parallel processing; would need some gain adjustments in the summing node, but the M-S circuits have the generic possibility to just that when not in M-S mode (buffer mode)...

Cheers,
-chris
(snowing (again) in New Hampshire!)

 
> It would seem that the simple 10k resistor on the input is not a true (high impedance) current source to push current into the virtual node amongst other things overcoming errors in the opamps

It is. But you give it two opamps. Which one "gets the push"?

Also: the 10K pushes, the opamp's FB resistor pushes back. With two OAs and two FBRs, which one does push-back?

I feel your pain about extra resistors.

-from snowless Maine
 
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