Because of no junction across the JFET?

[Ribbledox]

Halooba!

Is it right to state that:

"It is due to the fact that there is no p-n junction between the source and the drain of the JFET, its output graph (VDS) can be extended below zero, and there is no need for a dc offset"?

And that:
"this is one major advantage of the the JFET, for VCR applications, as no dc-offset will lead to no thump"?

Cheers=)

:wink:

 

[Guest]

[quote author="Ribbledox"]Halooba!

Is it right to state that:

"It is due to the fact that there is no p-n junction between the source and the drain of the JFET, its output graph (VDS) can be extended below zero, and there is no need for a dc offset"?

And that:
"this is one major advantage of the the JFET, for VCR applications, as no dc-offset will lead to no thump"?

Cheers=)

:wink:[/quote]
Not in general. Saturation region, where transistor performs in
controlled resistor is also in BJT ("base current controled resistor"), but in FETS is linear in bigger
drain voltages = you can have bigger collector swing and bigger
dynamic range. And is voltage controlled. And this civilisation
is still around voltage (and other potentials) as something representing value.

xvlk