This is the sort of circuit that probably gives good results in a simulation but is difficult to translate to a design that works well in practice.
So, several points:
1) The current through the first stage is set by the small difference between the forward volts of an LED and the base-emitter junction of a silicon transistor, both of which have a large tolerance and both change with temperature. You've given yourself 50V at the current source to play with (but where are you going to get a -50V supply in practice?), so why not improve the reliability of the design by using a 6.8V zener diode (best temperature coeff voltage) instead of the LED and increasing the emitter resistor to get the required current?
2) The BC550s are high-voltage transistors, but otherwise unremarkable. The maximum voltage they need to work with is the full common-mode range of the input plus the bias volts of the 6DJ8s, a total of (say) 25V. Most standard transistors could handle that, and you could choose ones that have lower noise figures than the BC550. You only need to go sqrt(2) times better to need only one transistor per phase and then you avoid...
3) If you stick with using two transistors in parallel, you need a way of ensuring both the d.c. and the signal current is equally shared between them. Separate emitter resistors are all very well, but they don't take account of things like component tolerance and Vbe differences. Maybe a 20R pot between the low ends of the resistors?
4) In a similar vein, you need a way of trimming the input stage for d.c. balance between the two current paths The wipers of the 20R pots from point (3) could themselves go to another 20R pot whose wiper goes to the current source.
5) CMRR. The only concession the design makes to common-mode rejection is the compliance at the collectors of the input transistors and the current source. From there on, common-mode has the same gain as signal. But that is a consequence of ....
6) Balance between the phases. The circuitry after the anodes of the first stage comprises two completely independent single-ended gain of 3 amplifiers, with no attempt to match any of the parameters between the phases. I think you should be considering designs that have more cross-coupling between the phases.
7) The open-loop gain of the output stages is a bit less than 30, so there's not much spare for the negative feedback to work with for distortion reduction and to keep the output impedance low.
Apologies if this sounds like a severe critique, but they were the thoughts that came into my head when I glanced at the schematic. Interesting post, though!