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Hey guys. I still dont have the scope. It's in the lab. Will post the pics of the waveforms on Monday when I have access to one. I'm using an at 400W atx pc supply, don't know if that could cause a problem. The supply provides 20A at 12V.
 
You could also just use a car battery, or something like a few 12V 7Ah SLA's in parallel.

Can you provide s photo of your prototype?  How did you design the choke and confirm that it isn't saturating?  Is your pwm circuit on a custom pcb with careful star grounding, and local decoupling, and with a FET gate driver IC that is adequate, or is this your first attempt at a smps?
 
Hi Trobbins. This is my first attempt of an smps. My prototype is on perf board, I will upload a pic now. The mosfet is being driven by an attiny 45, it is an irlz44n, logic level mosfet, I don't know how to test for saturation on the inductor but it's a 220uF according to the calculation which required 200. Any help will be appreciated. Thanks again guys.
 
smps involve narrow high current pulses. Layout and and unintended impedance in the high current loops can degrade operation. As already shared the power source needs to be low impedance to not sag from the narrow high current pulses.

A scope is very useful, especially if it is kind of working. The scope can reveal where it is falling down from heavier loading.

In practice the layout matters a bunch for clean output, and lower noise interference. Many standard chips actually provide layout advice. 

Not rocket science but definitely science.

JR

[edit....  perhaps TMI but here is an app note from a micro company about smps http://ww1.microchip.com/downloads/en/AppNotes/01114A.pdf  They discuss driving gate capacitance around page 33 but don't talk about specific components or micros.    ]/edit]
 
Quint24 said:
Hey guys. Here's and update on the converter. Currently it's boosting to approx 30V constant. This is with a 5W load and the output current is very low 0.13A. I require 1A. When I put a 50W 30 ohm load on it, the output voltage fluctuates like crazy well below the desired value. I can't figure out why this is happening, any ideas?

I don't know, but -- again! -- I suspect the firmware.
 
I guess you haven't checked the gate waveform to see if you actually are able to drive it at 100kHz without any power conversion going on, or even more importantly when the drain waveform is also involved and the gate switching requires more grunt.  I can't imagine that uP chip has any kind of suitable drive output port?
 
Hey guys, sorry for the late response. Had quite a bust week. This is the latest update. I checked on the scope and was getting the required 100kHz. I removed the feedback and put in a pot to adjust the duty cycle manually. Currently I am able to get 20V at 0.6A which is lower than the expected output voltage of 30V. I will attach pictures of the breadboard design as well as the obtained waveforms.
 
Is the waveform driving the fet?  Are probing at the fet g-s?  What is the waveform when converting some power?
 
Hey guys. That was the waveform to the gate, it's quite noisy when it's connected to the load, I never took pics though. Will do that on Monday.
 
Quint24 said:
Hey guys. That was the waveform to the gate, it's quite noisy when it's connected to the load, I never took pics though. Will do that on Monday.
It may well be noisy because you effectively have a 'rats' nest ' layout.  Can you probe the fet gate-source terminals at the device using a probe with short ground pin , and taking a single shot waveform capture.
PSo3N.jpg


The concern is that your micro may not be able to adequately switch the FET with practical rise and fall times.
 
Hey Abbey. I had a 100uF cap between the supply and group just before the inductor, is that big enough or should it be larger?
 
Quint24 said:
Hey Abbey. I had a 100uF cap between the supply and group just before the inductor, is that big enough or should it be larger?
While modern electrolytics are better than they were, you may also need a HF cap (like ceramic disc or film) in parallel.

JR

PS: Look out for those grounded scope tips,, easy way to blow stuff up.
 
Quint24 said:
Hey Abbey. I had a 100uF cap between the supply and group just before the inductor, is that big enough or should it be larger?
I can't see it on the picture. It must be VERY close to the inductor and the FET's source. I'm not sure 100uF is enough, depends on the construction, and, as JR suggests, it may take advantage of a ceramic capacitor of at least 0.1uF.
But really, we're all shooting in the dark, till you show us the waveforms.
 
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