Capacitor first!?

[krabbencutter]

I'm taking this to a new thread because I don't want to derail my other topic.
Recently @Khron suggested to me that power rails should connect to the bypass caps first before going to the IC power pins. He provided these two articles for reference: https://e2e.ti.com/blogs_/archives/...e-decoupling-capacitor-is-it-really-necessary & https://www.emcstandards.co.uk/files/part_5a_decoupling.pdf
The TI blog post makes a very clear case for good decoupling layout and why the path between IC & decoupling cap should be as short as possible. But while Fig. 3 in the article depicts the power trace running through the capacitor first, this detail of the layout is not mentioned anywhere in the author's argument.
The second article explicitly mentions the power-through-cap layout: "To help the decap remove noise from the power bus, it helps if the current from the power supply has to flow across the pad of the decap to get to the IC."

Yesterday MidnightArrakis wrote: "A lot of my PCB-design work has been in various "RF/microwave" environments and the many engineers I have worked with all had top-level engineering degrees in categories you didn't know existed from colleges and universities that you have never heard of!!! The point being is.....-- ALL -- of these engineers stressed upon me time and time again that you -- ALWAYS ROUTE TO A CAPACITOR FIRST -- before any other component!!!".

Khron raised an interesting point that I was previously unaware of and I would like to follow the path of scientific explanation. To help illustrate my question I've copied a figure from Khron's second article and have added a modified layout:



In both cases the distance between IC power pin & decoupling capacitor is exactly the same. The only difference is the orientation of the power trace.
- what problem will the layout in (B) create in a circuit?
- if (B) is indeed inferior, how can the difference between both layouts be illustrated in a scientifically accurate and easy to follow setup?*
- how is this relevant in an audio circuit?

*I'm specifically thinking about something like this video from w2aew which greatly helped me understand the importance of keeping bypass claps close to the chip:

Cheers!

Edit: split "what problem will the layout in (B) create in an audio circuit? (No RF, no high speed digital, just audio!)" into two separate questions

 

[john12ax7]

It won't matter much for audio.

 

[Khron]

It won't matter much for audio.

While that may be true, it's not necessarily the worst thing ever to develop "best practice" habits that apply just the same (or even more so), should you end up expanding beyond "just audio". Why paint yourself into a corner?

 

[JohnRoberts]

To help visualize impact think of traces and vias as series resistors.

JR

 

[krabbencutter]

While that may be true, it's not necessarily the worst thing ever to develop "best practice" habits that apply just the same (or even more so), should you end up expanding beyond "just audio". Why paint yourself into a corner?

yeah, I should have made the audio-only restriction separate and have edited the post accordingly. After all I still want to understand in what contexts the capacitor-first routing would be of practical relevance.

 

[ccaudle]

The only difference is the orientation of the power trace.

I would expect that the only time there is a detectable difference is when the risetime of the current draw is fast enough that the distances involved can be viewed as transmission lines and not as lumped elements. Since propagation velocity of traces over FR4 is on the order of 7ps/mm then you would have to worry about rise times in the 10ps or 20ps range. At that frequency range the physical size of the bypass capacitor becomes dominant, so in practice it won't make a difference that you care about. At those rise times you also won't be routing power with a trace, you will have to use one or more power planes with very closely spaced ground planes to use the interplane capacitance as part of the power distribution bypass.

 

[merlin]

In both cases the distance between IC power pin & decoupling capacitor is exactly the same. The only difference is the orientation of the power trace.
- what problem will the layout in (B) create in a circuit?
- if (B) is indeed inferior, how can the difference between both layouts be illustrated in a scientifically accurate and easy to follow setup?*
- how is this relevant in an audio circuit?

The difference between the two diagrams is marginal. The point is more clear if we exaggerate the diagram to show the difference more clearly. Does this help?