CFP design

[Samuel Groner]

Hi

Recently re-read this page on CFP design:
www.dself.dsl.pipex.com/ampins/discrete/cfp.htm

Quote: The value of Rc is crucial to good linearity, as it sets the Ic of the first transistor, and also determines its collector loading.

The design he shows has Rc = 3k3. However, I'd like to use CFPs for input stages where I want much higher Ic for the first transistor (for lower noise) than such high values would allow; typically I got down to values between 68 and 680 ohm. With these values, is there any linearity improvement over a simple emitter follower?

As always, any insight greatly appreciated!

Samuel

 

[bcarso]

You just want to run a lot of current overall I think. Play with the ratio of currents in the two transistors for lowest distortion---you may want the second device to be a larger geometry than would be typical for the CFP. I suspect a 1:10 current ratio is about right but that's just a guess.

You could also explore making the second device itself a CFP to optimize the second (of now three devices) transistor's noise. At some point things are going to require some compensation C's and maybe R's.

 

[Samuel Groner]

Thanks for your answer. Let me ask a bit more specific and consider the schemo I posted in your recent mic pre thread: [removed]

I suspect that Q1 causes most of the nonlinearity as it does not have any local feedback (this may not be true, but let's assume it is). First attempt is to replace it with a CFP. The 4.6 mA Ic is optimized for a 2SC3329 and 75 ohm source resistance, giving a NF of <1 dB (according to the datasheet) - a feature I would like to hold up with the linearity improvement.

So if I understud you right, Rc will not influence noise - but I suspect the second transistor will?

At some point things are going to require some compensation C's and maybe R's.

How would you add compensation? I noticed some emphasised overshoot after inserting the CFP, so this might help.

Samuel

 

[bcarso]

Rc will have an effect based on its current noise referred to the input---calculate that i sub n and divide by the effective transconductance of the input stage to see how big it is. The effective transconductance is about the reciprocal of Re + Rshunt, until bulk emitter R starts to get important---I don't know where that is for the 3329 yet.

But clearly the Rc contribution won't be terrible---it helps that you have three diode drops worth of voltage across to work with. Then do the same thing for the contribution of i sub n in Q4 base current, and e sub n for the Q4-Q5 combo. These are all approximations to do a reality check---the actual precise expressions would fill a page and not be all that useful most of the time anyway.

Q1 is linearized by Rshunt if Re is much smaller, which at 4.6mA it is, but it still may be the origin of a fair amount of the distortion. But closed-loop the signal required out of the collector of Q1 is small because you have so much gain following. Most of the loading is from the feedback network itself and maps to the collector of Q5 times the (geo?) mean betas of Q8 and Q9---if these are about 100, that's 200k at the Q5 collector, probably comparable to Q5's diode-ballasted output Z. The gm of Q5 and diode affair is probably around 70mA/V so the gain from the base to the collector is about 7000, which in turn means the current in Q1 need only move about 9 uA p-p for 30V p-p out, if I've fumbled through the math correctly. And that's not much out of 4.6mA.

One key to these high-feedback local pairs and triplets is that they will show a negative input Z, usually mostly capacitative. By putting a compensating C to common at the input this can be neutralized, but the optimal value depends on the source impedance. I did some sims with a triplet as I suggested might be tried, and even with a 100 ohm source the effect was significant and required about 22pF to quell. This worked better than any other arrangement of shunt-to-common or feedback C's and R-C's within the loop, also better than any Zobel-type output loading networks.

Beware of stray inductances in the layout! Simulators assume these parts are squished together at a singularity ;-)

 

[Samuel Groner]

Thanks Brad for the explanation.

I played a bit more with this design and right now I'm here: [removed]

Open loop gain is now monstrous: [removed]

As shown, I get very funny step responses: [removed] and [removed]

Lower output levels and higher gains make this effect smaller. Lowering R3 helps as well. C2 does not have much influence on it.

Can someone give me a hint what is going on here and how to get rid of it? Thanks!

Samuel

 

[PRR]

> I get very funny step responses:

The input stage is now big enough to drive the 10K load directly through the 33pFd compensation cap. And in-phase, instead of inverted phase as the amplifier does. The cap drives the output instantly, the amplifier takes longer to pass signal.

Try a 600 ohm load. Try a few K in series with the 33pFd. Try taking the 33pFd one stage earlier: seems to me you have a triple Darlington up there, and I'd be inclined to treat it as a single stage. I have not thought what happens when the first device in the triple Darlington also has its Collector dumping into th input emitter.

 

[bcarso]

Also: the simple feedback pair itself, used in this way as a composite transistor, exhibits quite a lot of preshoot. The Ccb of the input Q couples through the Q2 b-e R and b-e junction to the resistive load above, before the delays through the devices produce the desired inverting response.

Even a single device shows a little of this.

I did some sims with different transistors last night of the simple pair, output taken from the top and an R loading the follower output to set the transconductance. Even with the 75 ohm Rs and input C to ground (optimized) I still had substantial preshoot with really fast (~1 ns) pulses, getting almost tolerable if 8GHz transistors were used.

But it is over in a hurry, which is to say that some more input bandlimiting will get you out of trouble. This is audio after all!

I'm trying to figure out ways to reduce the preshoot in general but it's tricky and probably not necessary for these purposes. One way involves noting that the response of a compound voltage follower by itself is pretty clean, once you've compensated for the negative input C effect. So if that output drives an R going to a good current mirror, and the "current feedback" goes to that mirror output Q emitter, the output of the mirror becomes the equivalent of the composite collector in the original circuit.

Or, use a common-base stage and flip the polarity in a fast inverter stage later. But what is the preshoot of that, or for that matter the current mirror?

Also---though it won't solve all of the preshoot problem---you have so much potential voltage-to-current gain in that input composite that you might think of running the output into a good mirror rather than attempting a lot of second-stage gain. If the mirror output node Z is high enough (remember to include the buffer-referred output loading) you get your low freq loop gain back. Then there is less delay through the system after the first stage.

 

[bcarso]

While insomniac this early AM I checked out the preshoot behavior of the Wilson current mirrors, and it's pretty terrible.

However I revisited a different topology with complementary parts that worked a little better, and then devised a way of partially compensating for the preshoot at the output. It doesn't have the accuracy of a Wilson mirror but would be adequate inside of a closed-loop design, probably. I will try to publish something in time after some refinement. I wound up in sim with about a 5% of full step preshoot, and I could slow the stage down a bit to quell overshoot. However, one of the tricks involved using a sidechain stage with a bit of current gain, and it has to be very fast and not muck up the response. I used a handy ideal V-I for the purpose so it remains to be seen if a real ~single Q fast stage will suffice in its place.

Again, my advice still is just to slow things down at the input to systems that are challenged, unless of course it has to be so much slower that it affects audio/near-audio frequencies.