[quote author="okgb"]Some answers from Dan
Regarding peterubber's question of the switch capcitor bank ;
From the Dan
I was trying to reduce the worst of the parasitic effects, ESR as the
major one. The reason I didn't bias the center point is due to the
rather poor leakage specs
of electrolytics, any bias shows up at the output, as well as causes dc
shifts when the gain changes. If they were perfect it'd be a good idea,
on the other hand[/quote]
Thanks for passing on this info.
I wouldn't need to bias 'em if they were perfect.
Nah, that's a cool quote but is cheating a bit of course :thumb: :grin:
It's actually entangling two different things.
You CAN wish that a perfect electrolytic had zero leakage. Cool. But would it be reasonable to expect from a normal electrolytic polar cap that it suddenly lost its '+' & '-' upon entering a perfect world ? :shock:
Yep, in a sense one could say, as in that it became a bipolar (non-polar cap), but...
All cool, read more about that 'center-tap' in the cap-thread that's now going on.
Or just skip that, 'cos it'll take more than a few cups of coffee to digest the info over there. Quick conclusion from there is that the center-tap resistor isn't the holy grail, just use a recent bipolar. Dunno if these are easy to get in such values as needed here though.
Cheers,
Peter
