midwayfair
Well-known member
orpheusmaximo said:Got it? Question: In relation to R10 as variable resistor, don't you think it would give some control to what goes through to D2, and thus it's impact in the circuit?
R10 is essentially a current limiting resistor. Q2 is only an emitter follower -- it's a buffer. You aren't getting more gain or bandwidth out of it by varying the resistor. So what would be the point in playing with it? The only thing that happens is that you can change the output drive, which may lower the output impedance of the microphone. I don't think you're getting much better, if at all, than the 7.5K can provide. If you increase the output current, it lowers the supply voltage supplied because it puts higher demands on the phantom power supply. If you raise it, you reduce the output current and that might cause issues. I really can't see any reason to touch it.
Here's a list of things that I found useful in the mic [EDIT: I know I'm repeating some things here; I'm trying to add some context and make sure all the info is in one place and repeated]:
-Remove R1, R2, and C1 (or really, any one of them if you're just modding a mic and not building it from teh ground up). I rarely see people mention these components, and Gus left them in his sim schematic, but all they do is create noise. They exist in the schematic because they were a test signal insertion point. Near as I can tell, these are an actual mistake in the microphone. I recorded before and afters and it's 6dB less white noise with them removed.
-Bypass R6 with a large cap (as is done with C4). This will increase the gain and lower white noise, so this is also a big improvement in the signal:noise. There are ways to avoid the increase in gain, but it would involve rerouting a bunch of sensitive components on the board. The gain increase isn't huge, though, and in fact the mic will still be less sensitive than something with the Schoeps circuit. If you do this, you can adjust the value of R6 to optimize the bias voltage on the drain of Q1. Also, note that this is different from just grounding C4! The point of the second capacitor is that it filters the intersection of R6 and R7.
Alternatively, you can take ln76d's advice and simply rework the gate input removing the 1G that intersects R6 and R7, jumper C1, and then adjust R7 to correct the drain voltage (which will be wrong once the gate isn't elevated). Do it that way instead of removing R4, which is already connected to ground. (Your goal should be optimal routing for the sensitive parts and this makes the least number of things to change.) In a mic without polar patters and only a two-sided capsule, this is pretty much the ideal input stage. It ensures that the membrane never has any voltage on it from something leaking through the cap (can attract dust), removes a capacitor completely, and increases the impedance that the capsule sees, which improves the S:N.
-R9 and/or C6. These form a high pass filter going into Q2. Grab a calculator or just experiment. This is where the high pass switch is in models that have it. And actually, this is an excellent argument for keeping the emitter follower in some builds of this schematic (the ones with switches) instead of ditching it for a higher ration transformer (aside from the improved S:N): All the options for a high pass filter that exist with only a single stage are either really convoluted, cause additional loading on the capsule, or could potentially change with different preamp loads.
There are a bunch of refinements or simply different ways of doing things that can be done on pretty much any circuit.
"Replacing C8 with 1uF foil cap (max 3.3uF) and for better low end response increase C1 to 100nF."
C8 is already 4.7uF. Making it 1uF lets through LESS bass. The output cap is FINE. You could replace it with a film cap if you want to be really a*** about capacitor distortion, but there are a dozen other components that could stand an upgrade before that one. (Like the filter caps.)
C1 and the FET gate are already an all-pass stage. Grab a calculator and estimate the gate input as 187M (that's ~300M for the gate and 500M for two 1G. Note that the FET itself has lower resistance than the two 1G!) to see just how far below 20Hz the cutoff is.