Paralleling Transistors in LTP Config?

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thermionic

Well-known member
Joined
Jun 3, 2004
Messages
1,671
Hi,

Let’s say you have a classic LTP / Diff Pair front end and you want to apply it in a particularly noise-sensitive scenario. One way to reduce noise would be to parallel the transistors. Going on the basis that the circuit is proven to be reliable over time, would you literally just parallel the transistors on each input without consideration to other factors? Is it really that simple? I’ve managed to find numerous examples of where transistors are paralleled for noise reasons, but in one-sided circuits, not LTP scenarios – is there a reason for this?

Thanks in advance.

Justin
 
Hi,

There's a lot to be said about this and most likely it'll also happen here.

For now let's stick to:

one-sided circuits, not LTP scenarios :
No, just think of the LM394, MAT0x etc, that's LTP-usage. These types don't necessarily need to be used in LTP-config (IIRC there's a single-sided example in the LM394 datasheet), but most often these are indeed used as a LTP.

without consideration to other factors :
As you'll know improvements go along the line of doubling (more specific: going from 1 to 2 devices gives the same improvement ([dB]) as going from 128 to 256. So diminishing returns w.r.t. invested devices & board area.
And from a certain point on the noise-contributions of the LTP-active-devices won't be the dominating ones anymore. So little use to go further.
Depending on topology you might even be adding too much parasitics from a certain point on,
so adding more devices can't be considered an improvement anymore then.


Bye,

  Peter
 
Since posting here I've had correspondence with someone who designs topologies for a living. He tells me that, in accordance with the likes of D Self, current sharing on modern low-noise transistors for small-signal duties (i.e. LTPs) tends to be sufficiently good as to negate obligatory ancillary emitter resistors. I was also told that in reality, the benefits of paralleling 'ok' transistors will not get noise performance as good as a single 'excellent' transistor, such as the modern epitaxial ones made in Japan.


Justin
 
> One way to reduce noise would be to parallel the transistors.

Huh?

Forget parallel.

Higher device current reduces Voltage noise.

Lower device current (and higher Hfe) reduces Current noise.

So determine source impedance, assume a reasonable Hfe, now you know your optimum device current.

For 10K source maybe 20uA. For 10 ohm source, maybe 20mA.

Find a device with high Hfe and low parasitic resistance.

Now if you really have a 10R source, but the available good-Hfe devices have 20 ohm parasitic base resistance, noise is bad. NOW you parallel to get the equivalent Rbb far below 10 ohms. Four devices would be a good start. Forty devices is not a lot better.

> in one-sided circuits, not LTP

Sure. The noises of the two differential devices will ADD. (RMS-ly.) 0.5uV each sums to 0.7uV noise from the pair. If you are really crying for lower noise, you often have to go SE.
 
PRR said the important bits. Paralleling only reduces secondary voltage noise effects (mostly rbb', perhaps 1/f noise and parasitic emitter resistance), it does no address basic shot noise and current noise mechanisms (assuming we're talking BJT here). Something else you want to be aware of: paralleling increases the effective input/output junction capacities. Not nice in many cases.

Samuel
 
If you are really crying for lower noise, you often have to go SE.

An example would be the Self MC preamp design here: http://sound.westhost.com/p25_fig1.gif

Samuel - you mean paralleling can increase Cob, correct? That would make sense.

Thanks to all - illuminating as ever.

Justin
 
Samuel Groner said:
Something else you want to be aware of: paralleling increases the effective input/output junction capacities. Not nice in many cases.

In all respect, increasing capacitances not 'something else', it was alluded to already above.

Regards,

  Peter
 
thermionic said:
Hi,

Let’s say you have a classic LTP / Diff Pair front end and you want to apply it in a particularly noise-sensitive scenario. One way to reduce noise would be to parallel the transistors. Going on the basis that the circuit is proven to be reliable over time, would you literally just parallel the transistors on each input without consideration to other factors? Is it really that simple? I’ve managed to find numerous examples of where transistors are paralleled for noise reasons, but in one-sided circuits, not LTP scenarios – is there a reason for this?

Thanks in advance.

Justin

Paralleling devices was more common before acceptably low noise devices could be purchased off the shelf. You never get something for nothing, so as noise voltage drops, the noise current increases. The relationship for this uncorrelated noise is SQRT of sum of squares, so 3db change for every doubling. Correlated physical characteristics like capacitance would increase linearly.

This would only make sense for extremely low impedance sources but I was able to buy single devices that worked at MC phono cart impedances years ago. 

JR
 
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