RAM Access times

[mckenzie]

Hi, I have unearthed my old Waldorf Micro Q from storage but it's not well and has a failed SRAM IC, it's one of 3 that the DSP uses. The SRAM is a GS72108TP-12 but its proving difficult to get hold of through normal channels although it does still exist so it seems - GS72108TP-12 Price & Stock | DigiPart

Mouser do have an identicaly spec'd newer part apart from one thing which is the access time. Original part is 12ns but the newer part is 10ns.

I don't suppose there are any memory experts here that might have some idea if the newer IC would work or not ?

Thanks

 

[JohnRoberts]

I wouldn't call myself a memory expert but in general better is just better....

Faster access time should not have any negative impacts.

JR

 

[ruffrecords]

It is less than 2-% faster; probably due to process improvements as much as anything. I think it should be OK.

Cheers

ian

 

[mckenzie]

Great thanks for the replies, I will give it a go.

 

[user 37518]

It is less than 2-% faster; probably due to process improvements as much as anything. I think it should be OK.

Cheers

ian

Less than 20%

 

[JohnRoberts]

With digital, good enough is generally good enough, and slightly faster is better.

[TMI] I have some painful memories of being an analog guy trying to troubleshoot digital circuitry. As I recall I once had to add an extra gate in series with a memory read logic line, so the propagation gate delay of the extra gate would slow down the read/write enable line to nudge the timing in line with the memory chip's needs. The nice thing about working with modern digital platforms is they routinely have critical memory built onto the same chip, making critical timing decisions moot. [/TMI]

Of course this has nothing to do with your question.... I think.

JR

 

[Dan Mills]

There speaks a man who has never had to lay out DDR3!

Modern digital has both timing (as in trace lengths to a small fraction of an inch), and signal integrity constraints written right into the standards, and it don't work reliably if you fail to meet them! This after the memory controller has run a training sequence to learn what the timing on your particular board is...
There is NOTHING simple about high speed memory interfaces (Just done a zynq DDR interface at 1600MT/s, one for the PS and one for the fabric), fun times.

 

[JohnRoberts]

Congrats but.... The OP is dealing with difficult to get static RAM (?) not modern DDR (double data rate) memory.

True you got me... I never laid out DDR3 and never will. While timing with digital stuff could be a PIA even last century. That's why I liked the big micros with the memory inside and well sorted.

Hopefully at some point we will hear back from the OP, who hasn't been around for a couple weeks.

Are you specially predicting a problem from substituting 10 nS SRAM for the original 12 nS SRAM? I could imagine 12 nS parts becoming harder to find if people start using the 10 nS parts instead (pure speculation).

JR

 

[Matador]

One issue I have seen is that i=cdv/dt cannot be overcome, meaning if the parts slew their outputs faster, short-term current requirements may be more than what was planned. Perhaps it makes sense to review bypassing of the memory components, and also maybe series termination resistances to make sure the busses still operate as normal.

However even saying that, it is only a 16% increase in speed, which means it's Likely Fine(TM).

 

[Dan Mills]

I would expect a 10ns static ram to work just fine where a 12ns part was used unless someone has designed something utterly pathological.

The nice thing about modern memories (Yes even the DDR stuff) is that the controllers do to some extent self train to what your board actually does, and they usually have far better behaved pin drivers then the old DRAM parts which were a 'mare when combined with something like an NMOS processor that had very asymmetric output drive and basically no noise margin, still got the scars from that as a teenager!

Even things like PCIe (Which given the speed you would expect to be a nightmare) is actually far easier to layout then PCI ever was, the end points have a training sequence so you don't even need the lanes to have the same delay, it basically just works if you get the pair impedance even close to right.

 

[swpaskett]

If it is truly just a higher speed grade part you should have no problem. Where you get into trouble is using equivalent parts that may have different timing requirements on the read/write and chip enable lines. So if you end up with a different part number as opposed to the same part with a faster speed grade, go through the specs to be sure the read enable, write enable, and chip select timing is at least as fast as the old part.


Bottom line — faster speed grade: go for it; different part number; curl up with the data sheets of the old and new part and compare r/w access timing. The new part must be at least as fast in every respect.

 

[mckenzie]

Thanks for all the help. I’ve talked to the engineer at Waldorf & he says there is a 50% chance the new part will work. Also there may be crashing after while, weeks or months, sometimes less. He said the speed cannot be too fast & might be that you have to exchange all three RAMs (so they match) if the speed difference is too high. Would have to set the DSP clock speed higher too if changing all three RAMs (which you can do in service mode).
He says he’s only ever replaced like for like parts & so hasn’t researched this issue, hence I just need to try it & see what happens.

I’ve been through the data sheets again & everything does look identical apart from a few things;

Write cycle time MIN is faster on the new chip. 10ns new, 12ns old.

Read address access time MAX value is 10ns on new chip & 12ns on old. Same MAX values with chip enable access time. Am unsure if these MAX values will be important.

The new chip has arrived now so will see what happens once it’s in place.


Cheers

 

[JohnRoberts]

Write cycle time MIN is faster on the new chip. 10ns new, 12ns old.

Read address access time MAX value is 10ns on new chip & 12ns on old. Same MAX values with chip enable access time. Am unsure if these MAX values will be important.

I am not the digital memory expert here... but my interpretation of those specs for the old part is that the read address has to be established for at least 12nS before the data is valid, for the new part it only needs 10 nS, so easier.

The new chip has arrived now so will see what happens once it’s in place.

that is the real test. Good luck.

JR

Cheers

 

[tkach]

Hello

Hope are you doing well

Please say, did you have bin file firmeware for directly download to micro q

Please, can you send this file to [email protected]

All the best

Hi, I have unearthed my old Waldorf Micro Q from storage but it's not well and has a failed SRAM IC, it's one of 3 that the DSP uses. The SRAM is a GS72108TP-12 but its proving difficult to get hold of through normal channels although it does still exist so it seems - GS72108TP-12 Price & Stock | DigiPart

Mouser do have an identicaly spec'd newer part apart from one thing which is the access time. Original part is 12ns but the newer part is 10ns.

I don't suppose there are any memory experts here that might have some idea if the newer IC would work or not ?

Thanks

 

[mckenzie]

Hello

Hope are you doing well

Please say, did you have bin file firmeware for directly download to micro q

Please, can you send this file to [email protected]

All the best

Q firmware is on the Waldorf website

 

[tkach]

Q firmware is on the Waldorf website

I need bin file directly from ram micro q (not midi from website)
Did you have?

All the best

 

[mckenzie]

No I don't but speak to Waldorf directly they're pretty helpful

 

[tkach]

Thank you very much