Schematic 'new' Roger Mayer RM58

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RuudNL

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Joined
Apr 26, 2009
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Haule / The Netherlands
Does someone have the schematic of the 'new' (mono) Roger Mayer RM58 limiter?
I am mainly interested in the way the gain reduction meter circuit was implemented.
The 'old' RM58 had a pretty non-linear dB scale, but it seems the 'new' version has a 'backwards' moving VU meter.
I would like to add this circuit to my 'old' RM58.
 

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RuudNL said:
I'm afraid I will have to borrow or hire one, and trace the circuit...
Wish I could help you with that!

I’m working on a 500 series PCB of your modernized RM57, and I was thinking of implementing a meter like the Hairball FET 500
 
Interesting! How far are you? Is there already anything we can see?
It is always a problem to add a gain reduction indicator to a FET compressor/limiter.
Especially because there is a pretty big tolerance in FET characteristics.
I suppose you need matched FET's for this. (Also if you want good stereo tracking.)
 
1176/78's offer 'duck db' Vu metering , maybe you could find inspiration there ,
it is nice to see the average db reduction negatively displayed on the meter ,fits with whats the ears are hearing .
 
RuudNL said:
Interesting! How far are you? Is there already anything we can see?
It is always a problem to add a gain reduction indicator to a FET compressor/limiter.
Especially because there is a pretty big tolerance in FET characteristics.
I suppose you need matched FET's for this. (Also if you want good stereo tracking.)
I’m glad you find that interesting because I’d love to have your insight.

My name is Travis btw.  I don’t post regularly but I read this forum all the time and I’ve come to really respect and appreciate your posts :)

At this point I pretty much just drew your circuit and added a few things but have not addressed the meter circuit yet. I balanced the input and output with THAT ICs and added relay true bypass and polarity protection.

This is not something I thought I would be sharing especially at this stage, it isn't super neat or professional. The LEDs are going to move to the bottom layer and I'm going to make a different footprint with SMD pads. Of course things are going to change to accommodate metering as well. I'm not sure about the relay circuit or many things in general and this is something that I feel I need to breadboard before ordering PCBs. So I believe it is very possible I am showing some idiotic and critical mistake(s) even at this stage

Matching the 4 FETs  for stereo tracking is going to be slightly inconvenient but I think it will be necessary for my goal.

Essentially I recently built a FET/500 that I have been really enjoying and my plan is to build a stereo pair of your circuit with similar features to the FET/500. I am planning on using the stereo link on pin 6 for my rack though, no jack.

If you have anything to add or suggestions I am all ears (eyes?). I will post any of my own findings as well if anybody is interested. My girlfriend is graduating tomorrow though so this weekend is already looking really busy for me!

 

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Looks good Travis! The THAT IC's are great for balancing/unbalancing.
I have a 'hard' bypass relay in my version too.
The problem with the gain reduction indicator is that the relation between gain reduction and control voltage is far from linear.
So you have to use different 'tricks' to obtain a reliable indication.
In the circuit I am using now, the meter indicates a bit too much between 0 and 5 dB gain reduction.
Maybe I can solve this with a couple of diodes (introduce a certain 'threshold'), to 'bend' the characteristic of the meter circuit a little...

Please keep us updated about your progress!
 
abbey road d enfer said:
May I suggest a mod that would improve the transient response? See attachment.

Thanks for the replies RuudNL and Abbey Road!

Really appreciate your guys’ knowlege.

Abbey I would love to understand the idea behind your suggestion. Does it essentially bypass the compression allowing a bit of uncompressed signal through?
 
No, it puts the op amp in the CV loop which servos / linearizes the variable resistor characteristic of the JFET. But I would think keeping the 1M divider would be better still (like the 1176). Meaning just break the net between the JFET drain and C3 and connect C3 to the output of the op amp instead.

But if you mod the circuit like this is it still a "Roger Mayer RM58"? I usually try not to mod things like this if I don't have to. Frequently the defects of a circuit contribute to the sound (overdriving tubes, warbling oscillator of a CS-80 synth, blocking distortion in a Fuzz pedal, ... etc).
 
squarewave said:
No, it puts the op amp in the CV loop which servos / linearizes the variable resistor characteristic of the JFET. But I would think keeping the 1M divider would be better still (like the 1176). Meaning just break the net between the JFET drain and C3 and connect C3 to the output of the op amp instead.

But if you mod the circuit like this is it still a "Roger Mayer RM58"? I usually try not to mod things like this if I don't have to. Frequently the defects of a circuit contribute to the sound (overdriving tubes, warbling oscillator of a CS-80 synth, blocking distortion in a Fuzz pedal, ... etc).

You guys never cease to amaze me.

Thank you so much.

I will try both ways when I get this going on the breadboard.
 
squarewave said:
No, it puts the op amp in the CV loop which servos / linearizes the variable resistor characteristic of the JFET.
Sorry, wrong analysis. In the original arrangement, the control voltage is delayed by charging capacitor C3 via a 1Meg resistor, which slows the attack time; my mod charges C3 via a much smaller resistor, resulting in faster and more predicatble attack.
Actually, there are two resistors involved, R12 and R3, which makes the analysis a tad more complex.

But I would think keeping the 1M divider would be better still (like the 1176). Meaning just break the net between the JFET drain and C3 and connect C3 to the output of the op amp instead. 
No; if you had equal resistors, the AC voltage on the gate would be far off the ideal half-way. Note how I have dilmensioned the resistors as mirror image of the gain resistors around the opamp.
 
abbey road d enfer said:
Sorry, wrong analysis. In the original arrangement, the control voltage is delayed by charging capacitor C3 via a 1Meg resistor, which slows the attack time; my mod charges C3 via a much smaller resistor, resulting in faster and more predicatble attack.
I don't understand that at all. I realize I was wrong about the linearizing because, as you say, the gain of the op amp would break the "ideal half-way" character. Ok. But the "control voltage is delayed" makes no sense. The 100n and 2x 1M resistors are effectively a high pass filter. If you reduce the size of the resistors, that will just shift the corner frequency up and reduce transient response at low frequencies. I wouldn't be surprised if I were wr-wr-wrong here but right now, I just don't get it.
 
squarewave said:
I don't understand that at all. I realize I was wrong about the linearizing because, as you say, the gain of the op amp would break the "ideal half-way" character. Ok. But the "control voltage is delayed" makes no sense. The 100n and 2x 1M resistors are effectively a high pass filter. If you reduce the size of the resistors, that will just shift the corner frequency up and reduce transient response at low frequencies. I wouldn't be surprised if I were wr-wr-wrong here but right now, I just don't get it.
Think how the control voltage goes to a voltage divider with 1Meg in series and 1Meg+100nF as shunt. Response to a unit step is a ramp going from 0.5 to 1, so gain reduction would also ramp. With my proposed arrangement, control voltage ramps from 95% to 100% in a much shorter time, making this delay unnoticeable.
 
abbey road d enfer said:
Sorry, wrong analysis. In the original arrangement, the control voltage is delayed by charging capacitor C3 via a 1Meg resistor, which slows the attack time; my mod charges C3 via a much smaller resistor, resulting in faster and more predicatble attack.
Actually, there are two resistors involved, R12 and R3, which makes the analysis a tad more complex.
No; if you had equal resistors, the AC voltage on the gate would be far off the ideal half-way. Note how I have dilmensioned the resistors as mirror image of the gain resistors around the opamp.
I don't think that is how it is supposed to work. The time constant of R3/C3 is 100mS so C3 never charges so the control voltage is simply half the value of the voltage formed across C10. There is no delay in it reaching the gate. The purpose of C3 is to couple half the drain source signal to the gate in order to cancel out some distortion without impressing the control voltage on the signal.

Cheers

Ian
 
ruffrecords said:
I don't think that is how it is supposed to work. The time constant of R3/C3 is 100mS so C3 never charges so the control voltage is simply half the value of the voltage formed across C10.
The control voltage on a sustained note is almost DC. So the voltage that reaches the gate evolves from 50% right at the beginning to 71% after 1TC (100ms) to 90% after 4TC (400ms). Since the control voltage law is the typical 1/x, that means the gain reduction evolves in a ratio of 2 over the first 100ms. That may not be what the user expects, particularly if he chose a fast attack setting.

There is no delay in it reaching the gate.
Yes there is; it's not a typical RC delay, it's a R/R+C delay.

The purpose of C3 is to couple half the drain source signal to the gate in order to cancel out some distortion without impressing the control voltage on the signal.
The principle of operation is to superimpose on the control voltage an AC component that is exactly half the voltage across the FET (from source to drain); this indeed for reducing 2nd-order distortion. Picking up the compensation signal from the output of the opamp indeed makes sure there is no direct injection of the control signal into the FET's channel.
 
JohnRoberts said:
I'm not sure people pursue RM gates for "clean" gating.

JR
That's correct; however I think it's important to understand the mechanisms at work that make most units imperfect. That is part of understanding why, although not perfect, they may have desirable characteristics. Since the same mechanisms are put at work in FET compressors, a good analysis is not solely academic.
 
abbey road d enfer said:
.... The principle of operation is to superimpose on the control voltage an AC component that is exactly half the voltage across the FET (from source to drain).....

Isn't AC voltage at the gate in your mod equal in level as d-s voltage?
 

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