What is the best "modern" frequency for the charge pump in a condenser mic?

[el_berliner]

A charge pump is used to generate the capsule voltage in a condenser microphone such as the NT1. The best way to do this is for the clock generator to oscillate at a frequency outside the audible range, e.g. 70kHz. But shouldn't it run at a sampling frequency above 192kHz these days so that it doesn't cause interference? But why doesn't any microphone manufacturer do this? What is the best frequency for the charge pump in the condenser mic to see the slightest interference in the audio and how can this be achieved?

 

[Khron]

But shouldn't it run at a sampling frequency above 192kHz these days so that it doesn't cause interference?

Why should it? And/or when's the last time such oscillator interference has been observed, and at a high-enough level to cause issues?

 

[rogs]

A charge pump is used to generate the capsule voltage in a condenser microphone such as the NT1. The best way to do this is for the clock generator to oscillate at a frequency outside the audible range, e.g. 70kHz. But shouldn't it run at a sampling frequency above 192kHz these days so that it doesn't cause interference? But why doesn't any microphone manufacturer do this? What is the best frequency for the charge pump in the condenser mic to see the slightest interference in the audio and how can this be achieved?

With all previous iterations of the Rode NT1 - and indeed almost all other condenser mics to date - all the internal mic circuitry has been analogue, and running the charge pump oscillators between 100KHz and 200KHz - with appropriate decoupling - has worked well.
Now that significant digital circuitry has been introduced into the mic body itself, I can see that oscillators close to sampling rate clock frequencies might give some cause for concern.
Not sure quite how things might be affected (or not?)......With 2 square wave ocsillators running in close proximity - and at similar frqeuncies - there might be some sort of heterodyning possible, which could introduce resultant residues at the difference frequency of the two clocks? That could well be audible.
But it would depend on some non-linear multiplication occuring.... Whether that might be a significant problem, I'm not sure?

I suppose one answer would be to increase the frequency of the voltage multiplier oscillator quite dramatically.
Although many circuits tend to use 4000 series logic - primarily for the flexibility of the DC supply voltage - 4000 series is not that fast.
It should be possible to run the clocks up at around 1MHz. Might start drawing a little extra current at that frequency though?.....

Or - consider using Hartley style oscillators - as in the 'Schoeps style' of Voltage Multipliers?.... Those already tend to be run in the MHz range.

Be interesting to discover whether Rode have made any significant changes to the voltage multipliers in their new 5th Generation 'digital' NT1....

 

[ccaudle]

But shouldn't it run at a sampling frequency above 192kHz these days so that it doesn't cause interference?

Ideally there should not be any detectable noise at the frequency of the capsule power supply. Have you checked the spectrum of the output to see if there is detectable noise? Around 100kHz is probably a good choice, high enough in frequency that it should be easy to filter with reasonably small capacitors, low enough in frequency that you don't have to be so concerned about parasitics of the capacitor mounting. Of course if using a CMOS charge pump rather than a traditional oscillator you have to check the edge rates to see what the highest frequencies of concern will be, it is the combination of repetition rate and edge rate which determines the spectrum of a square wave.