Samuel Groner
Well-known member
Hi
For some (rare!) applications I want to be able to match transistor pairs for beta and Vbe. As using a DVM to measure both parameters for each transistor and selecting pairs afterwards tends to be potentially imprecise (mostly due to the large tempco of Vbe and the lack of collector current control) I want to build a dedicated test jig.
It should allow me to match transistors with a beta of 50-1500 at collector currents from 150 uA to 3.5 mA to a precision of <5% (beta) and <1 mV (Vbe). My idea is to first measure beta for every transistor and afterwards testing matching pairs for the Vbe difference (rather than trying to measure Vbe directly). For the later I've come up with the following circuit: [removed]
For measuring beta I've found a schematic by John Chester: [removed]
However at the lower range of collector currents and higher beta range my DVM would need to measure down to the nA range which is asking too much. Any other circuit ideas for this? Comments for my circuit? Thanks!
[Edit new revision: transistor_test_jig_r1.pdf]
Samuel
For some (rare!) applications I want to be able to match transistor pairs for beta and Vbe. As using a DVM to measure both parameters for each transistor and selecting pairs afterwards tends to be potentially imprecise (mostly due to the large tempco of Vbe and the lack of collector current control) I want to build a dedicated test jig.
It should allow me to match transistors with a beta of 50-1500 at collector currents from 150 uA to 3.5 mA to a precision of <5% (beta) and <1 mV (Vbe). My idea is to first measure beta for every transistor and afterwards testing matching pairs for the Vbe difference (rather than trying to measure Vbe directly). For the later I've come up with the following circuit: [removed]
For measuring beta I've found a schematic by John Chester: [removed]
However at the lower range of collector currents and higher beta range my DVM would need to measure down to the nA range which is asking too much. Any other circuit ideas for this? Comments for my circuit? Thanks!
[Edit new revision: transistor_test_jig_r1.pdf]
Samuel