A new discrete current-feedback op-amp design -- RFC

[Gordy]

Actually, now I have looked at the schematic, I have a couple of questions. (However bear in mind that I am a tube guy and not familiar with SS, so please excuse any ignorance in my questions...)

1. The only reference points to ground are at the input and output, so do you need a tracking power supply to make sure the output sits at zero?

2. Simulator power supplies are perfect I guess, but what happens in the real world... does the output drift up / down with a DC offset? If so how does this affect performance? Maybe need a servo?

3. Is R13 the load, or is the load strapped across R13?

 

[Samuel Groner]

Can you elaborate on that? My understanding is that an active load will increase the open-loop gain somewhat and then reduce the overall nonlinearities of the whole structure when feedback is applied. Is that what you mean?

No, we were talking about random noise, not distortion. The gain of the input stage is given by Q1 transconductance times Q1 collector impedance. The use of an active load increases the collector impedance and hence first-stage gain. Which in turn reduces any errors (including noise) of the second stage by the same amount.

The reduction in distortion is probably mainly from reduced Q1 collector current magnitude as o/l gain above 1 kHz is not altered by this change.

Increased output stage bias to 30 mA.

So we're not yet class A; if you want to get anywhere near the SPICE distortion figures you'll need a *very* decent layout. The collector currents of the output stage are heavily distorted and will happily induce into the rest of the circuit. Its difficult to eradicate this effect entirely. Even in class A the currents may carry 5% distortion or so, which is sufficient to not make layout entirely uncritical. Your best bet is to route VCC and VEE in very close proximity (I've also considered the use of "star-quad"-like arrangements if there's sufficient space), and away from the input stage and feedback network. Similar concerns apply to the emitter currents of Q13/Q14.

I may need to up Q11/Q12 current to say 5 mA.

What's the current now? Anything below 5 mA seems to be pretty low to me, I'd rather consider 10 mA.

I presume you should be able to reduce R5 in value, with further enhancements in distortion particularly at high frequencies.

The only reference points to ground are at the input and output, so do you need a tracking power supply to make sure the output sits at zero?

Simulator power supplies are perfect I guess, but what happens in the real world... does the output drift up / down with a DC offset? If so how does this affect performance? Maybe need a servo?

Note that the output is DC coupled to Q1; this means that global feedback will force the output to track the input ground reference, so no need for a servo or precision supplies. Tube stuff often employs some sort of interstage AC coupling which prevents global DC feedback.

Is R13 the load, or is the load strapped across R13?

R13 is the load (together with the feedback network).

Samuel

 

[abbey road d enfer]

Can you elaborate on that? My understanding is that an active load will increase the open-loop gain somewhat and then reduce the overall nonlinearities of the whole structure when feedback is applied. Is that what you mean?

No, we were talking about random noise, not distortion. The gain of the input stage is given by Q1 transconductance times Q1 collector impedance. The use of an active load increases the collector impedance and hence first-stage gain. Which in turn reduces any errors (including noise) of the second stage by the same amount.
Samuel

Ok, that's exactly what I said. Increasing the gain of the 1st stage increases the overall open loop gain, then when NFB is applied, ALL nonlinearities (including noise in the subsequent stages) are reduced.

 

[jdbakker]

Increased output stage bias to 30 mA.

So we're not yet class A

No, I'm running it in AB. Note that it's still in Class A up to ~10dB below clipping, so for normal audio work it doesn't transition to B until you're pushing your signals well into your headroom. Looking at two of these amps in a differential setup (as used for the mic pre) the A->B transition is at 1.2VPP input when driving a 100+100Ω load.

(By the way, while I have always used a 100Ω load in my simulations, after some noise calculations it looks like my attenuator Z will be more like 200-300Ω. Less does not have a major impact on noise, and increasing its resistance will reduce attenuator dissipation from 'ridiculous' to merely 'high').

if you want to get anywhere near the SPICE distortion figures you'll need a *very* decent layout. The collector currents of the output stage are heavily distorted and will happily induce into the rest of the circuit. Its difficult to eradicate this effect entirely. Even in class A the currents may carry 5% distortion or so, which is sufficient to not make layout entirely uncritical. Your best bet is to route VCC and VEE in very close proximity (I've also considered the use of "star-quad"-like arrangements if there's sufficient space), and away from the input stage and feedback network. Similar concerns apply to the emitter currents of Q13/Q14.

I know. I intend to make use of the fact that in the mic amp two of these stages in differential configuration will draw approximately equal currents from positive and negative supplies (ignoring CM signals for a moment). Plus like I mentioned earlier Q13/Q14 will be fed from an unregulated supply while the rest of the circuit gets its own regulator. As 317s are cheap, each of the three gain stages in the mic amp will have its own +/-24V regulator to reduce coupling through the power lines.

There are more tweaks I'm looking into; one is to have a shared bias network (D1...D6) for both halves of the diff input; this would reduce supply and CM coupling at the expense of a more complex layout.

I may need to up Q11/Q12 current to say 5 mA.

What's the current now? Anything below 5 mA seems to be pretty low to me, I'd rather consider 10 mA.

Running it at 3mA now. I had it at 5mA, but that didn't seem to impact performance much, made THD a bit worse if anything. Actual transistors (with different hfe than the SPICE models) may require more juice.

JDB.

 

[jdbakker]

Some more tweaking over the weekend led me to eliminate one third of the transistors at almost the same performance (less than 1dB increase in 3rd at 1kHz). The new schematic is here (rev 1.2). The output has gone from three to two stages, it's now a rather vanilla non-bootstrapped diamond buffer. As a consequence the 0.5dB in-band gain peak is gone, too. I have modified some of the diode stacks to more easily be implemented in dual-series parts, and added a Baker clamp to Q5 to make positive clipping somewhat more well-defined.

I wish I could say that all this was the result of careful design review, but that would be a lie. In truth SPICE was having a hard time coming up with a DC operating point for the differential version of this amp, which annoyed me enough to go on a Muntzing spree. In the original version of the amp (without the VAS input current source) the open loop gain and the distortion were dominated by the impedance at the collector of Q4, to the extend that when I started testing it with a load I could see distortion rise which necessitated an extra emitter follower stage. After I added the current source I should have done a regression analysis, to see if those extra parts still served a purpose.

I presume you should be able to reduce R5 in value, with further enhancements in distortion particularly at high frequencies.

Did that too (from 220Ω to 33Ω), with the predicted result. Thanks again!

By the way, I wouldn't be surprised if this circuit made a fine headphone amp...

JD 'Beschränkung' B.

 

[Samuel Groner]

OK, that's exactly what I said. Increasing the gain of the 1st stage increases the overall open loop gain, then when NFB is applied, ALL nonlinearities (including noise in the subsequent stages) are reduced.

No, gain-bandwith (i.e. o/l gain above the dominant pole) remains constant. If it would not there'd be a need to increase compensation to maintain stability. It's a matter of gain distribution between first and second stage. I'd need to look at it again in detail to say in which frequency range there actually is a second stage noise contribution reduction as it's some time back since I've done a thorough analysis. The interfacing/interaction of these two stages is pretty complex.

I like the new revision, looks like a decent balance between complexity and performance. The differences between r1.1 and r1.2 are likely meaningless compared to layout effects and the voltage/temperature coefficient of R3. Perhaps I'd include a trimmer between the bases of Q11/Q12 to allow heat/distortion tradeoffs and catch tolerances.

If you want to have a SYS-2722 look at the prototype I'm happy to help.

Samuel

 

[jdbakker]

The differences between r1.1 and r1.2 are likely meaningless compared to layout effects and the voltage/temperature coefficient of R3.

Right. I'm planning to use through-hole parts for R3, as there are few SMD options with (a) enough thermal mass, (b) sufficiently high power rating, (c) 1% or better tolerance and (d) good availability. I briefly considered hi-power parts in a 2512 package, but those are IMO too hard to remove for beginning SMD solderers.

The idea for R3 is to have pads so builders can either have one 1W/2W resistor, preferably non-inductive wirewound (any good suggestions for sources?), or three 1K 0.6W parts in parallel for a cheaper and almost-equivalent build option.

Perhaps I'd include a trimmer between the bases of Q11/Q12 to allow heat/distortion tradeoffs and catch tolerances.

Mmm. I see what you're saying, but I'm not a big fan of trimmers as they often find a way to get noisy or intermittent at the worst possible moment, and the nicer multiturn parts aren't easily available in the low resistance value you'd need here. I'll think it over though, it might indeed be useful for the prototype. What I've often done in the past is have an extra set of pads in parallel with, say, R16, so that it's possible to tweak the bias by soldering in an extra resistor.

If you want to have a SYS-2722 look at the prototype I'm happy to help.

That would be exceptionally useful! Most of my test equipment is more RF-oriented, and a closer look with AP's finest would be very nice. I'll drop you a line once I get something that passes my sanity tests (ie: not an oscillator, not a radio receiver, no harmonics resolvable by my puny test equipment).

Thanks again,

JDB.
[almost done with the first revision of the diff I/O amp which is to be used as stage 2]