Chinese mic with Schoeps circuit

[Amled87]

I recently picked up two of these (because i'm beginning to work on and modify microphones and figured since I didn't have any schoeps style circuits it would be a fun place to start) for next to nothing. As far as i can tell, they have the normal Schoeps Jfet feeding a pair of PNP transistors. I've traced the circuit and even drew up a schematic using LTspice to see what was going on circuit wise and to see the frequency response. I've only showed the plot from the positive side (XLR pin 2) as Pin 3 is nearly identical just at difference phase. Any tips or recommendations for mods on these? The capsule appears to be a K103 single diaphragm style copy, but without the correct backplate holes. They don't sound bad, but wondering on ways to improve?

 

[Amled87]

Most curious about the capsule, anybody seen these or have any insight?

 

[Khron]

They don't sound bad, but wondering on ways to improve?

What are you looking / hoping to "improve"?

 

[Amled87]

What are you looking / hoping to "improve"?

They're a little noisy when "alot" of gain is applied for overhead and or acoustic guitar use. But, I guess I could alleviate that some by reducing the 150k resistors at R3/R4 to 100k and then adjust the 0.1uF coupling caps to have the same frequency response. Though, I don't think there would be much noticeable difference at all in the low-end (haven't done the math on the HPF, but I'm sure it's not much of if at all audible difference).

Would also replacing the whole output section with better matched transistors and closer tolerance resistors/capacitors help to alleviate noise as well? Since they're out of phase I'd want them to be as close as possible to cancel out, no?

Anything you can share about the capsule or if it looks familiar Khron?

 

[jp8]

That will do close to nothing to solve noise issues. Perhaps increasing the two 100nF coupling caps to 470nF. Other JFET maybe also a bit. Some really useful data here: Thread 'Comparison of JFETs for mic applications' https://groupdiy.com/threads/comparison-of-jfets-for-mic-applications.86559/

Increase 1G to 2G or even more. Make sure circuit board is very clean in the high-Z area around JFET and capsule.

Increase polarization voltage to 60V or more.

R6 and R7 are quite high. R7 is a major noise adder in this circuit. Around 2k should be feasible, depending on the current that is left for the JFET. Maybe lower the value of R5 for that and increase C6. Zener is at wrong node. Should be at tied to the collectors of the output BJTs. Zener noise can only be partially filtered by C6 due to low impedance of the zener, so it will now be injected in the signal path almost unfiltered. By moving it to the output BJT collectors, R5/C6 will filter noise. Output BJTs also like to see a fixed voltage at the collectors.

And for best headroom and lowest distortion, Source voltage should be at 3V and Drain at 9V. You might have to use a trimpot connected between gnd en the drain and connect the wiper to what is now the gnd connection of R8.

Use the LTspice noise simulation feature to simulate and optimize your circuit.

I hope this helped.

Jan

 

[Khron]

They're a little noisy when "alot" of gain is applied for overhead and or acoustic guitar use.

"Thank you" for attaching very clear photos of the existing circuit board, because "of course" all the existing noise is inherent to the circuit, not necessarily the physical implementation

@jp8 just added many pertinent pointers just as i was typing this up.

As a "bonus" you might want to consider adding a capsule bias supply (to increase sensitivity and signal-to-noise ratio, so you wouldn't need so much preamp gain and subsequent amplification of noise).

 

[Amled87]

That will do close to nothing to solve noise issues. Perhaps increasing the two 100nF coupling caps to 470nF. Other JFET maybe also a bit. Some really useful data here: Thread 'Comparison of JFETs for mic applications' https://groupdiy.com/threads/comparison-of-jfets-for-mic-applications.86559/

Increase 1G to 2G or even more. Make sure circuit board is very clean in the high-Z area around JFET and capsule.

Increase polarization voltage to 60V or more.

R6 and R7 are quite high. R7 is a major noise adder in this circuit. Around 2k should be feasible, depending on the current that is left for the JFET. Maybe lower the value of R5 for that and increase C6. Zener is at wrong node. Should be at tied to the collectors of the output BJTs. Zener noise can only be partially filtered by C6 due to low impedance of the zener, so it will now be injected in the signal path almost unfiltered. By moving it to the output BJT collectors, R5/C6 will filter noise. Output BJTs also like to see a fixed voltage at the collectors.

And for best headroom and lowest distortion, Source voltage should be at 3V and Drain at 9V. You might have to use a trimpot connected between gnd en the drain and connect the wiper to what is now the gnd connection of R8.

Use the LTspice noise simulation feature to simulate and optimize your circuit.

I hope this helped.

Jan

May I ask why increasing the 100nf caps to 470nf would do anything? The 100nf caps are already passing everything 10hz and above (10hz is the 3db point created by the hpf of the 100nf and 150k). I guess I should rephrase to why would pushing the hpf lower (into even more inaudible range) would help with noise?

 

[Amled87]

That will do close to nothing to solve noise issues. Perhaps increasing the two 100nF coupling caps to 470nF. Other JFET maybe also a bit. Some really useful data here: Thread 'Comparison of JFETs for mic applications' https://groupdiy.com/threads/comparison-of-jfets-for-mic-applications.86559/

Increase 1G to 2G or even more. Make sure circuit board is very clean in the high-Z area around JFET and capsule.

Increase polarization voltage to 60V or more.

R6 and R7 are quite high. R7 is a major noise adder in this circuit. Around 2k should be feasible, depending on the current that is left for the JFET. Maybe lower the value of R5 for that and increase C6. Zener is at wrong node. Should be at tied to the collectors of the output BJTs. Zener noise can only be partially filtered by C6 due to low impedance of the zener, so it will now be injected in the signal path almost unfiltered. By moving it to the output BJT collectors, R5/C6 will filter noise. Output BJTs also like to see a fixed voltage at the collectors.

And for best headroom and lowest distortion, Source voltage should be at 3V and Drain at 9V. You might have to use a trimpot connected between gnd en the drain and connect the wiper to what is now the gnd connection of R8.

Use the LTspice noise simulation feature to simulate and optimize your circuit.

I hope this helped.

Jan

I do thank you though! This isn't my circuit, just what was in the mic. I've moved the Zener location R6 and R7 are 5.1k in the mic, but all the schoeps style mics I've seen have 2.2k there so I'll change those.

Khron, I'll work on getting some images of the board.

 

[jp8]

May I ask why increasing the 100nf caps to 470nf would do anything? The 100nf caps are already passing everything 10hz and above (10hz is the 3db point created by the hpf of the 100nf and 150k). I guess I should rephrase to why would pushing the hpf lower (into even more inaudible range) would help with noise?

To explain this, imagine two extreme situations. First, without the coupling caps. Output transistors receive full noise from 150k resistors. To avoid this, you want to shunt these resistors with a low impedance signal source. So ideally, this should be 0 Ohm, which would require infinite capacitance and a 0 Ohm output impedance from the JFET. Neither one is possible, but if the LF impedance of the coupling caps approaches that of the Drain resistor, further improvement by chosing even bigger caps is negligible. With 100nF caps, the impedance as seen by the BJTs is >15k at 100Hz, which is much higher than the Drain resistor value. Again, try noise simulations in LTspice to explore the effects. Very helpful in understanding what changes make sense and which ones do not!

Jan

 

[Amled87]

To explain this, imagine two extreme situations. First, without the coupling caps. Output transistors receive full noise from 150k resistors. To avoid this, you want to shunt these resistors with a low impedance signal source. So ideally, this should be 0 Ohm, which would require infinite capacitance and a 0 Ohm output impedance from the JFET. Neither one is possible, but if the LF impedance of the coupling caps approaches that of the Drain resistor, further improvement by chosing even bigger caps is negligible. With 100nF caps, the impedance as seen by the BJTs is >15k at 100Hz, which is much higher than the Drain resistor value. Again, try noise simulations in LTspice to explore the effects. Very helpful in understanding what changes make sense and which ones do not!

Jan

Thank you for the explanation, to LTSpice I go!

 

[RuudNL]

D1 and D2 are usually zener diodes (mostly 6.2V)
C9 doesn't have a function, it would prevent any polarisation voltage.
I highly doubt if R13 is really 456 Ohm.
Zener diode D3 may introduce noise, even with an 22µF electrolytic capacitor in parallel with it.

 

[Amled87]

D1 and D2 are usually zener diodes (mostly 6.2V)
C9 doesn't have a function, it would prevent any polarisation voltage.
I highly doubt if R13 is really 456 Ohm.
Zener diode D3 may introduce noise, even with an 22µF electrolytic capacitor in parallel with it.

I do believe it goes to ground and I made a mistake there. I'll check R13 again, but that is the value I came up. I'll check color code and also attempt to measure with my meter.

 

[Amled87]

That will do close to nothing to solve noise issues. Perhaps increasing the two 100nF coupling caps to 470nF. Other JFET maybe also a bit. Some really useful data here: Thread 'Comparison of JFETs for mic applications' https://groupdiy.com/threads/comparison-of-jfets-for-mic-applications.86559/

Increase 1G to 2G or even more. Make sure circuit board is very clean in the high-Z area around JFET and capsule.

Increase polarization voltage to 60V or more.

R6 and R7 are quite high. R7 is a major noise adder in this circuit. Around 2k should be feasible, depending on the current that is left for the JFET. Maybe lower the value of R5 for that and increase C6. Zener is at wrong node. Should be at tied to the collectors of the output BJTs. Zener noise can only be partially filtered by C6 due to low impedance of the zener, so it will now be injected in the signal path almost unfiltered. By moving it to the output BJT collectors, R5/C6 will filter noise. Output BJTs also like to see a fixed voltage at the collectors.

And for best headroom and lowest distortion, Source voltage should be at 3V and Drain at 9V. You might have to use a trimpot connected between gnd en the drain and connect the wiper to what is now the gnd connection of R8.

Use the LTspice noise simulation feature to simulate and optimize your circuit.

I hope this helped.

Jan

For the trimpot, what value should I use here? For most schoeps style mics, I see a 1Meg used, is that also feasible here?

 

[RuudNL]

Any value that is at least 100 times higher than the source resistor.

 

[Amled87]

Any value that is at least 100 times higher than the source resistor.

Thank you Ruud, if I change out both the source and drain resistors to 2k2 I have several Bourns 250k I can use there to adjust the voltage to get 9v at the drain and 3v at the base. If I read Jan's Instructions correctly, I'd connect one pin to ground, the other to the voltage side of the drain resistor and connect the wiper to R8 1G ground node (removing it from ground of course)?

 

[Khron]

the other to the voltage side of the drain resistor

* source resistor

 

[Amled87]

* source resistor

So one outer pin of the trim pot goes to jfet source side, the other to the source ground side (around the source resistor in other words) and the wiper to R8 1G ground node (removing it from ground) I have that correct?

 

[Khron]

So one outer pin of the trim pot goes to jfet source side, the other to the source ground side (around the source resistor in other words) and the wiper to R8 1G ground node (removing it from ground) I have that correct?

There we go

 

[RuudNL]

A 250 K trimpot will slightly disturb the balance between drain and source output, but for a test it is good enough.
(The source and drain resistors will have some tolerance anyway.)

 

[jp8]

250k > 100*2k2, so should be good to go. Is within tolerance band of the resistors, assuming 1% resistors. I'd expect a Drain voltage being off by 1% from the optimal value to not have any significant effect on THD and headroom, would it? Again, such mods can easily be explored in LTspice with the FFT view before wasting time and money on parts, solder and breadboards.

Jan