> What's the point of XORing the same two signals twice and then mixing them?
I don't think that is the idea.
You can't make an XOR as cheap as you can buy the 4-pack '4070.
If you use just one of four, you MUST give the unused gates something to do, or like a dog alone at home, they will get into trouble.
CMOS gates parallel well; CMOS inverters are often used parallel to drive heavy loads.
So since all 4 gates need work, the designer paralleled 2B and 2C as a beefier XOR.
The "out of phase" condition is the high level of the gate, an uncertain voltage. Gates 2A and 2D repeat the BC double-up but with out-phase drive, so we get the true "high" value of gates in this chip. (For light loads the difference "high" or Vcc may be teeny-- this may be over-cute, but "something" had to be done with pins 1 2 12 13.)
I bet it works the same with one active gate, and three gates' inputs tied to ground. But whatever.
For LSP1 LSP4 in-phase, the XOR is low. For LSP1 LSP4 out-phase, the XOR is high. For LSP1 LSP4 at in-between phase, the XOR is in-between.
The LM3914 is ratiometric. You put your low limit at Rlo, high limit at Rhi, and it reads Sig in relative to those voltages. Here gate-Low is approximated with Gnd, gate high is well set by a gate wired high.
A low-pass is desirable so the LEDs don't flicker madly. R7 C4 does this, with some loading on gates 2B 2C, which may have suggested the double-up beefing.
I have _no_ idea what PR1 is for. You can dial it down so no phase-signal gets to the display-- why? The right setting seems to be to dial it 6.8% above the top of the pot, to get the full range. Ah, perhaps the LM3914's top threshold suggests a reduced input. (ah-ah: he's not using all 10 LEDs so indeed the top is 105 shy of Vcc.) Still I see no reason for a large variation.