Liutmod said:
Yes Ian, can you tell us what are the values for the resistors and caps in the circuit you have posted?
Thank you
That is the $64K question. There is a whole range of values they could be depending on the load the amp will be driving and the source feeding it. There is no single answer so I will have to make some sensible guiesses.
Start with R2 and R3 the same value. That will give 6dB gain with no gain pot and we can increase it easily to 20 or 30dB. We want the collector of Q2 to be half the supply voltage for maximum output swing, so if the supply is 24V then Q2 collector needs to be 12V. The values of R2 and R3 can now b determined if only we knew what collector current we need in Q2. We don't need to drive a heavy load so 6mA will probably be enough. This means R2 +R3 = 2K (12V/2K = 6mA) so R2 and R3 are both 1K.
Q1 emitter is now at 6V so its base needs to be 6.65 volts or thereabouts. R5 and R6 for a pot divider across the supply to provide this 6.65V but they need to be large enough not to load the input. If we allow 0.1mA in this chain then the total value is 240K with a 24V supply. So R6 about 66K and R5 is about 175K - we could probably use a 68K and a 180K. The load these resistors present to the input is just under 50K - probably big enough.
Why did we choose 0.1mA through the bias resistor chain?? - because we are going to choose 0.1mA collector current for the first transistor because this will give lower (but probably not the lowest) noise and a good rule of thumb for bias stability is to make the bias chanin current equal to the collector current as long as the transistor hfe is more than 100 (which it is for a BC109). We know the collector of Q1 is only 0.65V below the rail because it is directly connected to Q2's base. For 100uA in Q1 we therefore need to set R1 to 6.65K. ^.8K will probably be fine - the collector current will just be a bit different and the dc negative feedback will sort out the dc conditions.
We have ignored the fact that Q1 collector current flows through R3 thus upsetting our assumptions about bias conditions but it is only 1/60th of Q2 collector current so the effect will be small.
Thies values should drive a 10K load with not problem. For a 3dB point at 3Hz with a 10K load, C3 needs to be at least 5uF. We can use 47Uf andmove the 3dB point down to 0.3Hz and forget about bass phase response.
At the input, the bias network looks like 50K but this is also in parallel with the input impedance of Q1 which is likely to be of a similar value (too complex to explain). So assume input looks like 25K. Using the same reasoning as for C3, this means we should start with 22uF for C2.
For the gain resistor R4 we know we want a maximum of 30dB of gain which is 32 times so R4 in parallel with R3 needs to be about 1/30 of R2 which is 33 ohms. For 3dB drop at 3Hz, C1 therefore needs to be 1600uF which is a tad on the big side. So we will have to reduce the current in Q2 to 3mA and increase R2 and R3 to 2K each. R2 increase to 66 ohms and C1 will be OK at 1000uF.
As you can see, this design is not without its compromises simply because we are trying to make a decent mic pre out of just two transistors. There are some simple modifiactions you can make to this circuit to make it work better but it is worth trying the above values in a simulator and seeing what you get.
Cheers
Ian