sismofyt
Well-known member
:grin: Topic says it all..
A better solution for what? I am also using the SPI ports of the chips I use, and I don't have any problems (yet).a fella called Pilo (think he posted a cpl time in the last arena) who is the brains behind most of this project is also playing with a PLL/PIC control board but I know he's been having a few rubs of chin with regards to the SPI n whatnot...mebbe u have a better solution?
The stuff I'm making is quite modular... I'm not sure the SIMM idea is good. In a system like that you have to decide what signals should be present on the bus in advance. Then later you may need different signals for something, so you need extra cables as well as the buss. The way I do it (cables) may look less nice, but it's very flexible...All aiming towards a v tasty DIY multi-chan adc/dac/adat box with a modular architecture for the adc and dacs (mebbe have them as SIMMs which plug into a main buss brd?)
I did post schematics and pics at the "other place"
A better solution for what? I am also using the SPI ports
The way I do it (cables) may look less nice, but it's very flexible...
The stuff I'm making is quite modular... I'm not sure
the SIMM idea is good. In a system like that you have to decide what signals should be present on the bus in advance. Then later you may need different signals for something, so you need extra cables as well as the buss. The way I do it (cables) may look less nice, but it's very flexible...
better solution for what? I am also using the SPI ports of the chips I use, and I don't have any problems (yet).
As you can see on the photo above my control board includes 5 SPI ports. In, out and clock are paralleled, and I simply use a seperate pin on the MCU for each SPI port. Why make it more complicated? MCUs with a lot of I/Os are easy to get. I can just upgrade from the current chip I use (with 32 I/Os) to a chip with 48 or 64 I/Os if I run out of pins...next the spi...
so... clock chip (pll1700, or another of the same kind), dac, maybe adc, pga (vol control), and maybe other device are working in SPI mode. Easy to handle it on software side. The problem is that some chip can't be chained... like adc and clock... so the idea is to have 4 "standard" spi signal (din, dout, ck, and cs) and some adress line (I think 4). so the cs signal for a chip is a logic "and" between cs and an adress decoder chip. My problem was where to put adress decoding stuff? on the core/clock pcb, or on module (adc, pga, dac) pcb...
I choosed the second solution... but this make things harder to connect an already designed dac with a spi interface to it, as it will need the decoding hardware... I'm still wondering what's the best;
I would put a connector per. module on the main board. The people in Bulgaria that make my boards don't seem to mind drilling a lot of holesI want to keep things doable by, almost, anyone... so putting one connector per module on a pcb is too much drill. So if each module use exactly the same signal, then there's no problem, I didn't choose 2x20 for nothing, it's the sze of standard IDE cable
well tell me what you think about, because this is really making me mad!!!
Yes! One row of your 40-pin connectors should be ground.oh another question, on the bus connector, do I have to separate each audio signal (clock, and data) by gnd?
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