Logic / TTL / CMOS / COMPARATOR

[jBam]

Hi all…  Just working on options in a decay circuit to allow different thresholds (e.g. Voltages) to trigger different decay curves. 

Lets say, for discussion, the there are three different bands of level, and I want each to have a different decay (those who have read my other posts will understand!)… Let's say Va; Vb; and Vc (high / mid / low)

The idea is that when a control signal is in the Va area it has a given decay rate; once it drops below a threshold into Vb region it instantly changes to a different decay rate; and then finally once dropping below another threshold is enters Vc region and a different decay rate.

The decay circuits are easy to get up and running; but I want to automatically switch between the circuits quickly and accurately (well - basically switch between resistors in a circuit) depending on which V band the control voltage is in.

Logic seems the way, and as always I've been reading a whole lot, and close - but "getting confused" again  :

Although the end product will probably adopt some kind of multiplexer with logic switching, I'll likely model a bit more from basic logic setups.  But I'd like to get some basics right first…

I'm currently assuming that it's ok to use comparators to establish when my CV is over the thresholds (super fast and accurate), and then feed these into logic gates which will then determine via a little logic matrix which analog switch is open.  I should be able to get this set up; but I'm wondering if this is not the right approach in practice?  Particularly using the comparator to create the logic signal which will then be used to control the logic matrix and switches.

I'm assuming the comparator will be good because is has no "mystery zone" like it seems TTL and CMOS gates have.  But my comparators will spit out AC + and - signals, whereas gates seem to spit out a tidy DC.  A few questions:

If I have e.g. a comparator spitting out 15V p2p AC; and an analog gate wants (e.g.) up around 5V for an ON condition, can I just attenuate the 15V p2p down to 2.5 p2p AC, and and then offset +2.5V to get a 0-5V on / off digital signal?  OR is that completely not necessary, because there's a much quicker easier way of creating a DC logic signal for my purpose?!  (keeping in mind I want accurate switching between threshold zones, and I'm concerned about that "mystery zone" in TTL and CMOS gates)

(by the way - yes ---> the 15 p2p AC could simply start at 5V… I guess my question is more about: is raising up an AC via DC offset an ok way to create a logic signal?… Or what's a recommended way to achieve this?)

Many thanks for any help!

 

[Andy Peters]

But my comparators will spit out AC + and - signals,

That's not a comparator -- a comparator's output is at either supply rail depending on the relative levels of the two inputs.

 

[JohnRoberts]

Hi all…  Just working on options in a decay circuit to allow different thresholds (e.g. Voltages) to trigger different decay curves. 

Lets say, for discussion, the there are three different bands of level, and I want each to have a different decay (those who have read my other posts will understand!)… Let's say Va; Vb; and Vc (high / mid / low)

I've read them and don't really understand.  ;D

The idea is that when a control signal is in the Va area it has a given decay rate; once it drops below a threshold into Vb region it instantly changes to a different decay rate; and then finally once dropping below another threshold is enters Vc region and a different decay rate.

The simplest way to do this is use one capacitor, and switch between different resistors for your different decay rates, using transfer gates (like CMOS CD4016 or CD4066).  A simple voltage comparator could determine which voltage range you are in to select the proper TG to switch on.

You may need some extra logic to selectively turn off the lower TGs.

The decay circuits are easy to get up and running; but I want to automatically switch between the circuits quickly and accurately (well - basically switch between resistors in a circuit) depending on which V band the control voltage is in.

Logic seems the way, and as always I've been reading a whole lot, and close - but "getting confused" again  :

Although the end product will probably adopt some kind of multiplexer with logic switching, I'll likely model a bit more from basic logic setups.  But I'd like to get some basics right first…

I'm currently assuming that it's ok to use comparators to establish when my CV is over the thresholds (super fast and accurate), and then feed these into logic gates which will then determine via a little logic matrix which analog switch is open.  I should be able to get this set up; but I'm wondering if this is not the right approach in practice?  Particularly using the comparator to create the logic signal which will then be used to control the logic matrix and switches.

I'm assuming the comparator will be good because is has no "mystery zone" like it seems TTL and CMOS gates have.  But my comparators will spit out AC + and - signals, whereas gates seem to spit out a tidy DC.  A few questions:

No as andy already shared a typical comparator will output a full voltage logic or perhaps an open collector pull down only (requires resistor pull up), like the popular LM339. 

If I have e.g. a comparator spitting out 15V p2p AC; and an analog gate wants (e.g.) up around 5V for an ON condition, can I just attenuate the 15V p2p down to 2.5 p2p AC, and and then offset +2.5V to get a 0-5V on / off digital signal?  OR is that completely not necessary, because there's a much quicker easier way of creating a DC logic signal for my purpose?!  (keeping in mind I want accurate switching between threshold zones, and I'm concerned about that "mystery zone" in TTL and CMOS gates)

(by the way - yes ---> the 15 p2p AC could simply start at 5V… I guess my question is more about: is raising up an AC via DC offset an ok way to create a logic signal?… Or what's a recommended way to achieve this?)

Many thanks for any help!

Not sure where you got so misinformed about comparators. It should be straightforward to generate an appropriate transfer gate control voltage from an open collector comparator.

JR

 

[jBam]

But my comparators will spit out AC + and - signals,

That's not a comparator -- a comparator's output is at either supply rail depending on the relative levels of the two inputs.

Ahh sorry… Yeah ---> Still learning!  I guess I meant ---> it goes past zero  ;D  like a big PWM….

I've read them and don't really understand.  ;D

haha… fair call  ;D

The simplest way to do this is use one capacitor, and switch between different resistors for your different decay rates, using transfer gates (like CMOS CD4016 or CD4066).  A simple voltage comparator could determine which voltage range you are in to select the proper TG to switch on.

Perfect!  That's what I'm trying to do ---> So seems I'm on the right track…!!

I might pop my decay circuit up at some stage ---> It does seem awfully simple (or at least a single stage without the switching discussed here… basically a cap and a resistor (intended as a pot)) ---> just want to get some opinions - I'd like the whole gadget to be "high quality" in terms of stages…)!  But It's working great in spice sims...

Not sure where you got so misinformed about comparators. It should be straightforward to generate an appropriate transfer gate control voltage from an open collector comparator.

Where might you think?!  Me of course  haha…  I'm still just fumbling my way around learning this stuff!  I looked at logic gates, but then saw the mystery zone where triggering is questionable in accuracy… and then thought back to reading about comparators a few weeks ago and thought: "wait… that might work ---> use that to feed the logic gates"…  But then got all confused again realizing that gates trigger e.g. 0 to +0.2 LOW and +3 to +5 HIGH… but comparators flip between -MAX V to +MAX V…

But you seem to suggest that a comparator will spit out a signal that can then easily trigger a gate as-is (?).

Just to clarify:

A comparator when at the negative rail ---> is this as good as 0V for a CMOS gate?  I was trying to read around and find out if gates open to both neg and pos signals… This is why I was thinking I might need to DC offset the output of a comparator to get a "LOW" negative rail output from the comparator closer to 0V for the LOW gate state. 

Again - any misinformation here is self taught …

Sorry if I'm still not quite explaining that right?!

Many thanks,

Jonny…...

 

[Andy Peters]

A comparator when at the negative rail ---> is this as good as 0V for a CMOS gate?  I was trying to read around and find out if gates open to both neg and pos signals… This is why I was thinking I might need to DC offset the output of a comparator to get a "LOW" negative rail output from the comparator closer to 0V for the LOW gate state. 

I think some basics are in order here.

First, don't think of digital logic gates as "gates" which open and close. You have to think of them as function generators. So an AND gate has two inputs and performs that logic function on them and drives the result out.

Next: when you want to "find out if gates open to both positive and negative signals," you have to realize that your logic gates' inputs have a hard constraint on input levels, which is that inputs cannot exceed either power-supply rail. If we are talking +5V logic, then you can't go in lower than 0 V and you can't go in higher than +5 V. If you do, for some logic families, input protection diodes turn on and the part might start to get hot. For others, you'll just instantly blow up the inputs.

A key thing here is that the gates are digital. You are correct about the "undefined" area between the logic-low and logic-high thresholds. But in practice with digital logic, that doesn't matter, because logic outputs are designed to switch very quickly (nanoseconds) between states. When driving a logic input they are never in that undefined area for very long.

Now, a comparator is really a one-bit analog-to-digital converter.  You set the logic-switching threshold by setting one of the two inputs to some voltage in the middle of your signal input swing. Your signal to convert, then, drives the other input. The output of the comparator is a logic level that switches between states quickly. What are the output states? With the standard LM339 and its friends, a low output is ground and a high output is whatever positive voltage you pull the output up to with a resistor. To make this output compatible with standard logic families, that positive voltage is the logic supply rail.

Can the comparator have both positive and negative input voltages (with respect to ground)? Yes, absolutely.

Oh, by the way: I highly recommend a good book on this sort of basic electronics, and that book is the Third Edition of "The Art Of Electronics" by Horowitz and Hill. Spend the money. It's worth it.

 

[jBam]

Hi Andy ---> thanks so much for the detailed response... really great information and has really helped in my understanding of things here.  I've learnt a heap of stuff really quickly, but some basics are still floating around which you've also really helped clear up here...!

e.g.

which is that inputs cannot exceed either power-supply rail.

...*Dull light globe flickers in my head*... I think I suddenly understand "single supply"... haha...  So that'd be setting up with e.g. Vcc= +5V; Vee ---> goes to ground.

Therefore a "single supply" comparator with these settings would spit out:  Close to 5V ON; Close to 0V OFF...  Which is what I'd want for a logic signal...

Got it   (I'd been messing around with dual supply +Vcc; -Vee... and getting a comparator that therefore spits out rail to rail +5 / -5... Like I said ---> very new to most of this stuff!)...

[EDIT: FYI - just mucking around in SPICE sims at the moment ---> so no smoking blown up gadgets yet!!]

Oh, by the way: I highly recommend a good book on this sort of basic electronics, and that book is the Third Edition of "The Art Of Electronics" by Horowitz and Hill. Spend the money. It's worth it.

Great!  Thanks --> I'll add it to my buy list   Along with the Opamp Cookbook (Walt Jung) recommended by PRR...

Thanks again... slowly pieces of the electronics puzzle are falling into place for me!

 

[JohnRoberts]

Hi Andy ---> thanks so much for the detailed response... really great information and has really helped in my understanding of things here.  I've learnt a heap of stuff really quickly, but some basics are still floating around which you've also really helped clear up here...!

e.g.

which is that inputs cannot exceed either power-supply rail.

...*Dull light globe flickers in my head*... I think I suddenly understand "single supply"... haha...  So that'd be setting up with e.g. Vcc= +5V; Vee ---> goes to ground.

Therefore a "single supply" comparator with these settings would spit out:  Close to 5V ON; Close to 0V OFF...  Which is what I'd want for a logic signal...

Using an open collector output comparator, it will only pull down hard to gnd (0v) and output high is a high impedance, so a simple 5V pull-up  like a two resistor divider, will deliver the desired 0-5V range from any PS more than 5V, while CMOS transfer gates don't need to run from only 5V. (+12v or more)

JR 

Got it   (I'd been messing around with dual supply +Vcc; -Vee... and getting a comparator that therefore spits out rail to rail +5 / -5... Like I said ---> very new to most of this stuff!)...

[EDIT: FYI - just mucking around in SPICE sims at the moment ---> so no smoking blown up gadgets yet!!]

Oh, by the way: I highly recommend a good book on this sort of basic electronics, and that book is the Third Edition of "The Art Of Electronics" by Horowitz and Hill. Spend the money. It's worth it.

Great!  Thanks --> I'll add it to my buy list   Along with the Opamp Cookbook (Walt Jung) recommended by PRR...

Thanks again... slowly pieces of the electronics puzzle are falling into place for me!

 

[jBam]

Using an open collector output comparator, it will only pull down hard to gnd (0v) and output high is a high impedance, so a simple 5V pull-up  like a two resistor divider, will deliver the desired 0-5V range from any PS more than 5V, while CMOS transfer gates don't need to run from only 5V. (+12v or more)

Very Good! Ok cool - thanks John ---> Just reading into open collector circuitry now (thanks to your tip)… Interesting stuff!  Also great to realize that there's no need to mess around with my current power source choice of 15V; and that I can very easily use this arrangement to create a 5V logic signal as you suggest…

I keep saying it:  this is fun stuff guys  ;D

 

[jBam]

OK - cool guys ... I now have all the gate triggers set up perfectly for the thresholds / regions ---> thanks for the advice ...

One question which may make a big difference in my setup:

I have three gate triggers.  Two of these are currently direct outputs from comparators; and one is  from a logic AND gate...

In a spice sim this works fine; but I'm thinking that this may not be ideal in practice? I.e. using two different styles of components to create a style of signal that is ideally identical in behaviour seems risky, and gate times / slews are likely different to comparators, however small...

Any thoughts? I can probably find a way to spit all signals out of comparators, or could easily send raw comparators through a dummy OR gate for consistency in trigger origin.

Or perhaps it doesn't matter for audio applications (particularly within a sidechain decay circuit as I'm using), because they're all insanely fast?

Thoughts?

 

[Monte McGuire]

Not sure specifically what your control voltage does, or what sort of variation you want, but here's a really simple way to do something related to what you're talking about. The attachment is a basic version of the circuit, just to show the general idea.

I built this thing to replace the standard RC gain reduction voltage hold/decay circuit in an ancient Gates 6144 vari-mu limiter. The standard circuit uses a single cap and one release time resistor to store, hold, and decay the gain reduction voltage from the detector diodes. This circuit makes the release time resistor essentially nonlinear with the GR voltage, allowing the release time to decrease with increasing GR voltage. The point was to make the release time speed up as the amount of gain reduction increases so that low amounts of gain reduction will use a longer release time, and that higher, possibly transient gain reduction peaks will 'go away' faster, helping to prevent the 'hole punching' effect that these old limiters were prone to.

Building this in production might be a complete PITA, but since this was a one-off, I was able to measure specific zeners so that they would turn on at specific GR voltages, and then activate their associated resistor in order to drain the gain reduction cap faster.

Again, I'm not sure whether this has anything to do with your application at all, but instead of a huge pile of complicated logic, a few zeners and extra resistors take care of all of that switching "logic". As long as you want a faster release with a greater GR voltage, then this circuit will work pretty well.

If this is irrelevant to your uses, I apologize, but 'm still curious as to the overall purpose of your nonlinear decay time. Decay of what? How do you want the decay time to vary with control voltage? What does the control voltage control?

 

[jBam]

Not irrelevant at all.. My circuit is still a bit abstract, but that's a great example and I appreciate your suggestion and may even consider similar things in my gadget (because more level decreases decay is one thing I've been messing with, using jfets - with fairly crappy results haha...)...

I've almost solved my immediate decay envelope problem, but I'll definitely look into your suggestion... My solution abandons the logic gates altogether, although the logic gate thing now has a new home in another part of the circuit for other reasons (monitoring / metering)... Still keen on the question of getting logic signals from different sources (some are gates; others comparators)... Any further thoughts on that?

 

[jBam]

If this is irrelevant to your uses, I apologize, but 'm still curious as to the overall purpose of your nonlinear decay time. Decay of what? How do you want the decay time to vary with control voltage? What does the control voltage control?

Hi again! Was actually quite drunk last night when I responded ... A friends birthday... Fixed a few typos in the last post this morning too ...

The decay is basically an envelope detector decay for use in dynamics control... I've been focussing on multi threshold design, with maximum flexibility - therefore e.g. Either a longer decay at a given input level or a shorter one... Hmmm... Hard to explain when I'm hungover! But I'm basically splitting a control signal into several portions: one peak; one at user definable mid levels; one at low levels... Each is able to be compressed or expanded... And each is intended to have independent attack / release... Attack has been easy; but decay "seemed" to be a little trickier due to interaction between level bands, so I dreamed up this triggering system discussed in this thread... As it turns out, the interaction between decays for each stage (ie overlapping decay tails) is actually fine and quite complimentary to the overall effect... I'd basically thought of an issue; tried to solve it; and the realised its not an issue after all!

The good news is that I've learnt how to generate logic signals for when each band is active (peak / mid level / low level)... For my design, this could be quite cool - for metering, it makes it easy to turn on and off which signal is fed to the meter (peak /mid/low)... For monitoring, I can now actually "solo" level bands, to help the user identify what aspect of the signal each band contains (it would be quite clicky and not necessarily pleasant, but it could help focus on eg the amount of a reverb tail the mid level processing can focus on).

It's quite an unorthodox gadget... But all spice sims are really really promising... In fact - I think it's gonna be awesome ---> I processed a wav file drum loop yesterday with quite heavy settings, and pulled through really nicely: licking the peaks off; expanding the mid levels with a bit more transparent punch; and drew up the low levels really filling the whole thing out hugely... It sounded awesome to be honest!! I'm very chuffed 

 

[abbey road d enfer]

Lets say, for discussion, the there are three different bands of level, and I want each to have a different decay (those who have read my other posts will understand!)… Let's say Va; Vb; and Vc (high / mid / low)

Google "window detector".

 

[jBam]

Google "window detector".

Absolutely and exactly what I'm trying to do! Thanks mate