Paralleling Transistors

[Samuel Groner]

I had two design ideas for opamp circuits which I do not remember having seen in a schemo, which is usually a bad sign for the idea as I must have missed an important drawback! But let's see:

First idea: Adding emitter resistors in the diff. input pair linearizes this stage, but increases the NF. What about paralleling transistors, each with it's own resistor? It surely (OK, probably) lowers noise, but does it also yield the same linearization? Or is this equivalent to paralleling N transistors per leg and adding two resistors with value 1/N? Hope I made myself clear...

Second idea: Stability in opamp-style circuits seems often be limited by the bandwith of the output stage. Why not paralleling several small-signal transistors instead of using one big output transistor which has a much lower Ft? Even when used at much higher hfe, the small-signal transistors should give higher bandwith.

Of course, paralleling devices is usually accompanied by higher cost and space. But what are there electrical drawbacks of my propositions?

Samuel

 

[bcarso]

The reason to use a resistor per transistor is to reduce the requirement on matching. If you had a bag of perfectly matched transistors you could parallel them with impunity.

Paralleling output devices has a long tradition in power amps. Again you often need to put the little R's in series with each ~cathode to enforce current sharing. If you are hard-switching power FETs this isn't required because the tempco of silicon resistance is positive, but in the linear region, at least below what is usually a prohibitively high current, the net tempco of drain current is positive.

But for smaller signal designs paralleling devices is fine and can give you a composite output stage with higher gain-bandwidth. Jung has a pair of output devices per polarity in his superbuffer for example. It is hard to find data on safe operating area for small signal devices though, so you need to do a lot of worst-case testing to gain confidence.

The SOA issue argues for putting up with the disadvantages of paralleled devices (complexity, more parts hence lower MTBF on the face of it, potentially more parasitic inductances/capacitances), since SOA problems arise from localized hotspots on a chip. If the chip is smaller there is likely a more uniform temperature across it.

Brad

 

[PRR]

> Adding emitter resistors in the diff. input pair linearizes this stage

If you have overall feedback: it may not linearize much, just shift things around. Feedback is our prime tool, feedback needs gain, resistors reduce gain.

> What about paralleling transistors, each with it's own resistor?

With or without resistors, sure. But note that lower current in each device suggests higher per-device resistors, same overall resistance. And be sure you are not shifting each device off the bottom of its noise curve.

Resistors to match offsets? If two parallel devices differ by 20mV, they will divide current 2:1. So if you have 1mA to split, they split 0.66mA and 0.33mA. This will not be a whole lot different from 0.5mA and 0.5mA. Another 20mV in the resistor doubles your noise resistance. And two devices from the same tape are probably within 5mV of each other. Resistors may not be needed.

In fact, I'm pretty sure that if you have enough resistance to "increase linearity" significantly, you will ruin your low-Z noise figure. For low noise, you want R less than 1/Gm. For linearity, you want R greater than 1/Gm. Q.E.D.?

In many practical situations, resistors are needed to set the compensation. Not inevitably, but when noise is not the prime directive, a little resistance there eases the GBW versus slew trade-off.

> Stability in opamp-style circuits seems often be limited by the bandwith of the output stage. Why not paralleling several small-signal transistors instead of using one big output transistor

Takes a hundred PN2222 to equal one 2N3055. Even at $0.10/each, they cost more, not even counting $0.0?/hole for PCB drilling 500 holes.

It's sure been done. Per-Anders has a headphone amp with around a dozen small output devices.

I guess the "advantage" is that you are paying for a larger total area of Base-stuff, so you get a better R-C product in the Base junction. The collector capacitance can't be a big lot different, if you want same power and SOA. Might be higher due to edge effects on 100 small dies. But to actually use that lower Base resistance you need very good busing of 100 Bases and all those emitters. Layout strays may kill the advantage.

 

[Samuel Groner]

Thanks for the answers and your educational effort!

I'm pretty sure that if you have enough resistance to "increase linearity" significantly, you will ruin your low-Z noise figure.

IIRC, Self uses 22 ohm per leg and gets an EIN of 120 dBu with 150 ohm source. I think he says that input stage linearity is increased 10 times compared to the case without the resistors (without "global" feedback applied, though).

My Q was whether it is possible to improve on noise without changing gain or linearity. If I understud your answers correctly, this is possible if we increase the bias current proportionally to the number of paralleled devices, right?

Of course, paralleling output devices was ment for medium-power (1 W or lower) only!

Samuel