prevent LM339/393 comparator hysteresis

[Analog_Fan]

circuit in the Falstad simulator

In order to control logic further down the line, I'm using a lm339/lm393 comparator powered from 5 V.
the input circuit is taken from another schematic used in a commercial product accept i added an upper limit of 5 V (diode clamp) as the voltage divider to set the threshold.
I have a pretty similar configured comparator in a other already soldered and finished device using the 22pF capacitor across the comparator.

this time i simulated it and the simulator shows hesitance on the rising edge.
if i try the same config as on page12 of the datasheet, i get ringing added.

the input circuit must remain the same including the 100pF.
could there be done anything to improve and get a clean rising edge?

 

[abbey road d enfer]

could there be done anything to improve and get a clean rising edge?

Have you tried the usual tricks?

• Increase threshold (increase the 10k to ground)
• increase output current (decrease the 10k that goes to +5
• decrease negative feedback (delete the 1 Meg from output to inverting input)
• add a little positive feedback (put a resistor between output and non-inverting input)

 

[ccaudle]

this time i simulated it and the simulator shows hesitance on the rising edge.

Without any specific values it is difficult to know whether the circuit is performing as expected or not.
What time range are you describing as "hesitance?" How does that compare to the response time described in section 9.2.2.4 of the datasheet?

 

[JohnRoberts]

using resistor pull up will always be slow and influenced by stray capacitance. I tried to use an open source with resistor pull-up to drive 5V logic from a 3.3v processor. I had lots of issues with imprecise clocking.

If you want logic edges maybe use logic.

JR

 

[Newmarket]

You want it snappy ? Suggest lower the pullup to 1K0. Add positive feedback.

 

[Analog_Fan]

using resistor pull up will always be slow and influenced by stray capacitance. I tried to use an open source with resistor pull-up to drive 5V logic from a 3.3v processor. I had lots of issues with imprecise clocking.

If you want logic edges maybe use logic.

JR

well, I'm designing it to take any signal (including bi-polar, synth) and respond to any over 100 mV.

It's just i have run out of 1K, 10K and 100K resistors than i could breadboard it, but than again you have the issues of the breadboard itself, lose contacts and capacitance.

any signal should be converted to logic this way to drive logic.

 

[Analog_Fan]

You want it snappy ? Suggest lower the pullup to 1K0. Add positive feedback.

OK, how about the positive feedback, heard/read that a couple of times before.
What should i do?

the 10K pull up is to keep the current usage in check, to a minumum for usage in synthesizer modules.

 

[Newmarket]

OK, how about the positive feedback, heard/read that a couple of times before.
What should i do?

the 10K pull up is to keep the current usage in check, to a minumum for usage in synthesizer modules.

Wrt positive feedback - see the various manufacturers datasheets for the formulas. But, as guide from memory start with some value in range 1M0 to 10M.
A weaker pull up will increase output rise time so it's a balance current vs speed.
So it's best if the circuit is arranged such that the output is normally high ie pulled up to the 5V.
I've used these where a very snappy response is required (fwiw to stop the charging of a high voltage cap at a precise level) and 1K0 did the job. May vary with your application but rise time / slew rate is basically dependent on the resistor value since stray/parasitic capacitance is essentially fixed.

 

[JohnRoberts]

well, I'm designing it to take any signal (including bi-polar, synth) and respond to any over 100 mV.

It's just i have run out of 1K, 10K and 100K resistors than i could breadboard it, but than again you have the issues of the breadboard itself, lose contacts and capacitance.

any signal should be converted to logic this way to drive logic.

and how many times have you used this circuit to drive logic, successfully?

I experienced difficulty with resistor pull-ups in a commercial design, but what would I know?

JR

 

[ccaudle]

I'm designing it to take any signal (including bi-polar, synth) and respond to any over 100 mV.

There is no current limiting resistor on the input, so bi-polar signals that go below ground reference will be driving directly into the clamping diode. Same for positive peaks above 5V.

Also the input resistors and input capacitor form a high-pass filter with a corner at around 15kHz, so the 4kHz signal shown will be attenuated quite significantly, a factor of 0.2 of the original signal will make it through. The comparator would not trigger until a 4kHz signal was at 500mV, rather than the 100mV you intended.

 

[Analog_Fan]

and how many times have you used this circuit to drive logic, successfully?

I experienced difficulty with resistor pull-ups in a commercial design, but what would I know?

JR

a couple of times, accept without the 100pF capacitor.
a voltage controlled switch, a ADSR circuit i revised and changed, a Logic module that i though myself.
the Voltage controlled switch works fine, i used a 22pF over the lm393, i copied that of the ADSR circuit.

but now analyzing with a simulator, i see things i didn't knew before or expect.
It probably works fine when outsource the pcb's and solder them.

I like to use the LM393/LM393 to have a guaranteed square edges, also the small 8 pin dip gives me back PCB space other wise lost if you need to use a 14/16 pin dip and unused gates and it needs the pull up.

Are there schmitt triggers in a 6/8 pin packages?
SOIC/DIP, SOT is to small to soldering iron tip.
Bit than again i can't set the threshold voltage, witch i can now.

my pcb's tend to be 19 mm wide.

 

[Analog_Fan]

There is no current limiting resistor on the input, so bi-polar signals that go below ground reference will be driving directly into the clamping diode. Same for positive peaks above 5V.

That's what i want and need. the LM393 is powered by 5 V, so i want to negate negative voltages as voltages over the supply of the LM393 to prevent damage to the comparator.
The current limiter is the 10K after the diode clamp.

Also the input resistors and input capacitor form a high-pass filter with a corner at around 15kHz, so the 4kHz signal shown will be attenuated quite significantly, a factor of 0.2 of the original signal will make it through. The comparator would not trigger until a 4kHz signal was at 500mV, rather than the 100mV you intended.

i copied that part of the circuit from the "commercial" Mutable Instruments Kinks Schematic (found on github) accept i added the upper voltage limiter diode.
the simulator shows that it work, click the link under the picture.
Also other people use pretty much the same circuit, accept a bigger capacitor.
But it also the reason why i started the topic to see what other people think of it.

You mean the 100pF and the 10K/100K after it? that's indeed a high pass filter.
But also a trigger circuit.

 

[Analog_Fan]

There is no current limiting resistor on the input, so bi-polar signals that go below ground reference will be driving directly into the clamping diode. Same for positive peaks above 5V.

Also the input resistors and input capacitor form a high-pass filter with a corner at around 15kHz, so the 4kHz signal shown will be attenuated quite significantly, a factor of 0.2 of the original signal will make it through. The comparator would not trigger until a 4kHz signal was at 500mV, rather than the 100mV you intended.

Emilie Gilltet from Mutable Instruments probably intented to have the 100K to ground before the comparator to prevent a floating input and the 10K to limit the current to the input.

 

[abbey road d enfer]

Emilie Gilltet from Mutable Instruments probably intented to have the 100K to ground before the comparator to prevent a floating input and the 10K to limit the current to the input.

Really? I would have thought it just electronics 101, probably as old as the first commercial use of transistors.
Considering that absence of sense of history, one young "inventor" will probably patent the voltage divider.

 

[JohnRoberts]

I like to use the LM393/LM393 to have a guaranteed square edges, also the small 8 pin dip gives me back PCB space other wise lost if you need to use a 14/16 pin dip and unused gates and it needs the pull up.

Perhaps I wasn't clear,,, the open collector comparator will provide a square falling edge, but the rising edge will resemble a RC (e^-t/rc). In my experience using an open drain with r pull-up on a SPI clock (that clocked on the rising edge) caused multiple false clocks. You can drop the r value lower but then current consumption rises.

Are there schmitt triggers in a 6/8 pin packages?

I have seen single "real" digital gates in small SMD packages

JR

SOIC/DIP, SOT is to small to soldering iron tip.
Bit than again i can't set the threshold voltage, witch i can now.

my pcb's tend to be 19 mm wide.

 

[Analog_Fan]

Really? I would have thought it just electronics 101, probably as old as the first commercial use of transistors.
Considering that absence of sense of history, one young "inventor" will probably patent the voltage divider.

well, the inputs are high impedance and probably don't need them or smaller, like 1K, right?
orginally the circuit used opamps.



since the LM393 has a PNP Darlington pair input.


the pnp keeps me wondering.

by the way on YoutTube is such guy (probably more than one) that is making tutorials and trying to reinvent/improve things, researched over and over by people much better qualified than him.

 

[Analog_Fan]

I have seen single "real" digital gates in small SMD packages

well as long as it's around 1 Milli second reaction time, I'm fine.


but i don't want hesitance(hysteresis) that would accept the next chip.

 

[JohnRoberts]

well as long as it's around 1 Milli second reaction time, I'm fine.


but i don't want hesitance(hysteresis) that would accept the next chip.

one mSec is a lifetime in digital logic

JR

 

[abbey road d enfer]

well, the inputs are high impedance and probably don't need them or smaller, like 1K, right?
orginally the circuit used opamps.

since the LM393 has a PNP Darlington pair input.

the pnp keeps me wondering.

TBH I don't understand any of this. Language barrier. Try Google translate.

I have simulated your circuit with LTspice. I don't see anything wrong, except that the rising edge may be too slow for the logic circuit it feeds, and that it works with square waves, which leading edge is transmirred without attenuation, but sinewaves below 10kHz will be significantly attenuated.
The feedback resistor (1Meg between output and inverting input) creates undesirable spikes, but the output signal is still usable.
The circuit works better without this resistor.

Now this is just simulation. The models used in simulation are quite often approximations, using controlled current or voltage sources for modelling actual transistors. Some of the effects actually happening in the real world are not included in these models.

 

[Newmarket]

but i don't want hesitance(hysteresis) that would accept the next chip.

Hysteresis is not hesitancy.
Generally you need hysteresis (ie slightly different thresholds for positive and negative going signals) to avoid multiple transitions at a single threshold.