prevent LM339/393 comparator hysteresis

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Reading ALL of the notes on data sheets is a good plan. it is surprising how may 'great designers' fail on simple issues.
Has the junction capacitance of the protection diodes been taken into account? Probably not important here. To 'drive' logic with clean fast signals usually needs active pull up and down (depending on speed that is required). The 1 Meg negative feedback is probably one of the worst mistakes.
 
The current limiter is the 10K after the diode clamp

That does not limit the current from the source device. You inadvertently limited the source current with the 100pF capacitor, but that also prevents the circuit from working properly.
the input circuit must remain the same including the 100pF

That does not make sense given the use you described. Why must the 100pF capacitor remain?

the simulator shows that it work

The simulator shows that the 10V input signal is only 260 mV after the capacitor.
If you specifically want a high pass filter for some reason that is OK, if you wanted consistent attenuation for every frequency then just a resistor voltage divider should be used.
That high pass filter also limits the current from the source, otherwise the only thing limiting the current from the source will be the output impedance of the source device. With the 10V source example used and a more reasonable input capacitor that would mean around 4.3V across the output device of the source. If the source device only drives this circuit that might be OK, if the source device drives this circuit and in parallel is connected somewhere else, there will be extreme levels of distortion.

You mean the 100pF and the 10K/100K after it? that's indeed a high pass filter.

Did you intentionally set the corner frequency at 15kHz? That seems strange for an audio device.

i copied that part of the circuit from the "commercial" Mutable Instruments Kinks Schematic

If you are referring to the similar input circuit on page 3, that is a very different use case than what you have described. In the Kinks schematic it is indicated for square wave input only, and is a differentiator to generate a pulse to a sample and hold circuit. You said you were designing your circuit to "take any signal," not only square waves and not only for generating a trigger pulse.
 
Hysteresis is not hesitancy.
Generally you need hysteresis (ie slightly different thresholds for positive and negative going signals) to avoid multiple transitions at a single threshold.
Indeed positive feedback (hysteresis) is supposed to provide a crisp transition and suppress being toggled by low level noise riding on the input signal. My problem with passive pull up was related to a clock line in a serial data (SPI) network. The clock uncertainty resulted in erroneous data transfers (extra bits passed when only one bit was expected).

JR
 
If you are referring to the similar input circuit on page 3, that is a very different use case than what you have described. In the Kinks schematic it is indicated for square wave input only, and is a differentiator to generate a pulse to a sample and hold circuit. You said you were designing your circuit to "take any signal," not only square waves and not only for generating a trigger pulse.
Indeed, it has a square wave symbol above the jack.
By any, i mean any signal that exceeds 100 mV.
 
Indeed positive feedback (hysteresis) is supposed to provide a crisp transition and suppress being toggled by low level noise riding on the input signal. My problem with passive pull up was related to a clock line in a serial data (SPI) network. The clock uncertainty resulted in erroneous data transfers (extra bits passed when only one bit was expected).

JR
this is what i have done before i went to bed.
Sample and hold control 2.jpeg
https://tinyurl.com/y6eqsm4q
that's positive feedback right?
reducing this resistor to a value smaller than 4.5M will cause the comparator to stay up all the time accept some fast downwards spikes

i did find this this ... after a poster mentioned positive feedback.
Analog devices: Using positive feedback to add hysteresis: the Schmitt trigger
however i don't really see the voltage divider in the example that sets the threshold, unless the 2 lower resistors are the voltage divider.

i raised the capacitor to 1nF, the capacitor is needed to create a pulse in the sample & hold and not stay active while there is a voltage on the input.

thank you for the help everyone.
 
Do you mean any squarewave? It could work, as long as the risetime is faster than about 100us.
There's more to a squarewave than amplitude and frequency.
indeed, there is something wrong here.
taking a sine wave as input and reducing it to 10Hz shows the circuit fails.
Setting it to 100Hz, makes the circuit react on the negative slope of the wave and "reset" on the high point.
 
The 10 Meg and the 100k are the positive FB path.
The voltage divider that defines threshold is the 1 Meg that goes to +V and the 10k to ground.
indeed, disconnecting the voltage divider from the negative pin and connect it to ground, the circuit keeps working.
that would save money and space :)
 
Indeed positive feedback (hysteresis) is supposed to provide a crisp transition and suppress being toggled by low level noise riding on the input signal. My problem with passive pull up was related to a clock line in a serial data (SPI) network. The clock uncertainty resulted in erroneous data transfers (extra bits passed when only one bit was expected).

JR
Yes. That type of application tends to lead toward push pull output comparators with intrinsic hysteresis. Or something using Schmitt logic ICS eg 74HC14 inverters. Think I have the device number correct from memory.
 
that's positive feedback right?
reducing this resistor to a value smaller than 4.5M will cause the comparator to stay up all the time accept some fast downwards spikes

i did find this this ... after a poster mentioned positive feedback.
Analog devices: Using positive feedback to add hysteresis: the Schmitt trigger
however i don't really see the voltage divider in the example that sets the threshold, unless the 2 lower resistors are the voltage divider.

i raised the capacitor to 1nF, the capacitor is needed to create a pulse in the sample & hold and not stay active while there is a voltage on the input.

thank you for the help everyone.
yes, but the hysteresis just makes the open collector comparator a little more immune to noise on the input signals... The resistor pull up will still be slow rising edge. This might be OK for digital logic that clocks on the falling edge which will be sharp because of active pull down. Any noise on the PS can superimpose on the pull up resistor output.

Active pull up and active pull down means never having to question what state is it in.

JR
 
I have seen single "real" digital gates in small SMD packages

JR
Check Texas Instruments "Litle logic", even Nexperia or NXP made those a while after (a year or so after i asked them, they appeared).
but only works in the 3V33 or smaller range.
You even got single D-type flip flops in a tiny package.

Litle Logic
 
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Check Texas Instruments "Litle logic", even Nexperia or NXP made those a while after (a year or so after i asked them, they appeared).
but only works in the 3V33 or smaller range.
You even got single D-type flip flops in a tiny package.

Litle Logic

I sort of doubt your request was material in their release tbh. Unless you have a great deal more leverage than I assume !
But single gate parts are not limited to <3v33. They may be optimised for that voltage and have corresponding logic levels but parts that will operate at nominal 5V - meaning usually max 5V5 are not unusual.
Single Gate Logic
 
i raised the capacitor to 1nF, the capacitor is needed to create a pulse in the sample & hold

That lowers the corner frequency to around 1500Hz. Do you need to create a pulse for a sample and hold? It isn't clear why you started out with a differentiator circuit for your application. It also is still not clear what your original complaint of "hesitancy" actually refers to.
 
That lowers the corner frequency to around 1500Hz. Do you need to create a pulse for a sample and hold? It isn't clear why you started out with a differentiator circuit for your application. It also is still not clear what your original complaint of "hesitancy" actually refers to.
i accepted that i have to stick to gates that are square, than it works just fine in the simulator.

differentiator, i copied that from Mutable Instruments Kinks (github), just replaced the opamp with a real comparator and i changed the rest of the circuit.
You don't want a permanent effect, but rather a pulsed effect.
Sofar i haven't made myself a Sample and Hold for my modular, i know there are LF398

hesitancy refers to that you have "critical" point around the threshold voltage where it could be "racing" between 2 states and what i could to prevent that.
 
differentiator, i copied that from Mutable Instruments Kinks (github), just replaced the opamp with a real comparator and i changed the rest of the circuit.
You don't want a permanent effect, but rather a pulsed effect.
I have no idea of what is a "pulsed effect".
hesitancy refers to that you have "critical" point around the threshold voltage where it could be "racing" between 2 states and what i could to prevent that.
As has been pointed to you several times, adding hysteresis is the way to avoid that.
The conversion from signal to pulses must be made with a circuit that responds to the spectrum of signal; whatever differentiation you think is necessary should be done after.
 
So...not wanting to criticise but is this thread not making very heavy weather of a quite routine application ? Over dependence on modifying an existing design seems imo to be a problem here.
So I'd suggest a fairly basic approach of
a) defining inputs
b) defining output signal requirements
c) implementing whatever is needed to achieve the input to output function. Where there are alternatives make a choice between elegance / repeatability / component count etc.
 
Agree with Newmarket, it is difficult to second guess the whole requirement so the 'source' signal characteristics need defining, and what the output of the proposed subcircuit is feeding (required risetimes and voltage levels etc) and then add in available supply rails etc. There are always many ways to implement many things, with a whole range of 'best' criteria.
 
a couple of times, accept without the 100pF capacitor.
a voltage controlled switch, a ADSR circuit i revised and changed, a Logic module that i though myself.
the Voltage controlled switch works fine, i used a 22pF over the lm393, i copied that of the ADSR circuit.

but now analyzing with a simulator, i see things i didn't knew before or expect.
It probably works fine when outsource the pcb's and solder them.

I like to use the LM393/LM393 to have a guaranteed square edges, also the small 8 pin dip gives me back PCB space other wise lost if you need to use a 14/16 pin dip and unused gates and it needs the pull up.

Are there schmitt triggers in a 6/8 pin packages?
SOIC/DIP, SOT is to small to soldering iron tip.
Bit than again i can't set the threshold voltage, witch i can now.

my pcb's tend to be 19 mm wide.
There are Hex inverter gates with Schmitt trigger input, maybe that could work for you.

https://www.ti.com/lit/ds/symlink/s...55974&ref_url=https%3A%2F%2Fwww.google.com%2F

From the datasheet, the lower threshold is at 0.5-1V and the higher threshold is at 1.5-2V. Don't know if that would work for you....
 

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