Schoeps Circuit with 150V Polarization

[Murdock]

I got my hands on some measurement mics from Rohde & Schwarz. The headamp needs an external PSU with 30V for the two stage impedance converter circuit and 150V for polarization. The output is unbalanced. I would like to try to make a new PCB to use with P48.
I know that the "Schoeps"/MXL603 circuit generates 60V from 48V Phantom power. Would it be possible to up that to 150V?

 

[rogs]

What may be simpler - and more predictable - than using a voltage multiplier based on an inductor based oscillator, might be to use one of the CMOS invertor based multiplier circuits?

I've found circuits based on figure 5 in this paper: https://gyraf.dk/schematics/Voltage_multipliers_with_CMOS_gates.pdf work very well.
That article goes on the describe and extended version in figure 11.... Somewhere between those two circuits for the voltage you require?

A couple of CMOS 40106 hex inverters should do what you need. Available as SMT devices if you are tight for space.
Don't forget to use capacitors with a high enough working voltage for the latter stages!

This type of multiplier seems quite popular with hobby DIY builders and Rode - for example - use it commercially on some of their mics.

 

[Khron]

Look up the schematic for the CAD GXL3000, they end up with 120v there. Upping the zener voltage at the input of that should help nudge that up to the 150v area.

The circuit is very similar to the Schoeps oscillator, just with a voltage multiplier tacked onto the output.

 

[rogs]

The circuit is very similar to the Schoeps oscillator, just with a voltage multiplier tacked onto the output.

I would suggest that the CMOS multiplier is simpler than a Schoeps 'Hartley' style oscillator ?
Only one resistor and one capacitor required ... plus a single invertor from within the same multiplier chip.....
And no inductors - with possible 'iffyness' in certain orientations? - to worry about.

 

[Murdock]

Thanks alot @rogs and @Khron!
Seems like a good idea with the CMOS multiplier!
But as I've only build tube mics before I probably have to follow "well-trodden paths" and use an existing ciruit. Eventough the smaller footprint and avoiding "iffyness" of inductors sounds good. Especially because I'm kinda experienced with SMD soldering because of my console.
I will study the papers of these CMOS multipliers and see if I can come up with something.

 

[Murdock]

Alright, I got used to Kicad and designed a PCB. I thought why not try the OPA Alice circuit with this one.
But before ordering and trying it out I wanted to understand something. What I'm unsure about is the way the CMOS multiplier is cascaded.
I drew it the way the paper on gyraf's site suggest. The 1nF cap (C103 in my schematic) doesn't go to ground but to the output of the second inverter.
But @rogs and Jules way of doing it is different. In LTSpice their way seems to work when the paper's work did not really...
Can someone please confirm that my schematic works?
And what about the charging capacitors? In the paper they suggest a value from 22nF - 68nF while Rogs and Jules circuit use 10nF.
I understand that they are there to hold the charge until the next pulse. Bigger caps need longer to charge but can hold it for longer, right? So what would be the benefit of using smaller or bigger caps?

 

[Khron]

Capacitor value - the capsule shouldn't draw any current, so the capacitance of those "reservoirs" is borderline academic.

In your schematic, the feedback resistor (R104) encapsulates the first three stages, instead of just the first inverter gate (as in the Gyraf paper, Jules' circuit or rogs' circuit) - any particular reason for that?

PS: Does the casing of the capsule need to connect to ground? Sort of assuming it threads onto a mic body of some sort..?

 

[Murdock]

Thanks for chiming in @Khron!
The last page in the Gyraf paper suggest this type of circuit with the feedback resistor encapsulating the first three stages. That's also what's different than Rog's or Jules' circuit. As the gyraf paper is the one using multiple inverters instead of one I went for their implementation.

The mic symbol is probably irritating and wrong. I have a capsule where the diaphragm is connected to the mic housing. Signal is coming from the backplate.

 

[Khron]

The mic symbol is probably irritating and wrong. I have a capsule where the diaphragm is connected to the mic housing. Signal is coming from the backplate.

The only reason i asked was that, if both sides were "free" / floating, you could have skipped the coupling capacitor and one of the 1G resistors, but nevermind then

 

[rogs]

One further point about this multplier circuit that sometimes gets missed.....

In my version you'll see that I have specified usings a CD40106, to get the voltages I've listed on my circuits.
If you employ a different make of 40106 -- say the HEF40106 for example - you will almost certainly get different results.
Schmitt threshold voltages tend to vary a bit between manufacturers.

The oscillator frequency will be different, for example, with similar value passives.....
I selected 10k and 1nF for my CD40106 version....
When used with a 12v supply rail, you might expect an oscillator frequency of around 125KHz.
With the same passive values selected, and an HEF40106 employed, then the frequency will be more like 180KHz
In addition, the multiplier stages will tend to generate higher voltages as well.......
A circuit providing c.72V final output with a CD40106 will output closer to c.80v with an HEF40106 -- all other things being equal.
When more stages are employed, that differential may become even greater, I would imagine?

Just something to keep an eye on.....

 

[Murdock]

Thanks @rogs for the reminder! That's good to know for eventually troubleshooting if the voltages are not as intended.

Can you explain the difference between your schematic and the one in the gyraf paper? If you would cascade two 40160 inverters how would you do it?
Why do they encapsulate the first three stages with the feedback resistor and go to the next inverter after the fourth stage and not the last stage of the first inverter?
Any idea?

 

[rogs]

Thanks @rogs for the reminder! That's good to know for eventually troubleshooting if the voltages are not as intended.

Can you explain the difference between your schematic and the one in the gyraf paper? If you would cascade two 40160 inverters how would you do it?
Why do they encapsulate the first three stages with the feedback resistor and go to the next inverter after the fourth stage and not the last stage of the first inverter?
Any idea?

I'm not sure quite why you would choose to use more than one inverter for the oscillator, where you have Schmitt trigger inputs?.....

I do recall that circuits using other CMOS inverters, without Schimitt inputs, as oscillators - like 4049 or 4069 - usually require more than one gate --
I forget the precise reason. I'm sure there are explanations in the appropriate data sheets and application notes for those devices...

Where there are input thresholds with known hysteresis levels -- ie. Schmitt triggers -- I can't see the point of using more than one gate?.... Especially in this type of application, where we are essentially drawing very little current from the oscillator output!

As for cascading - I'm one for simply connecting in series. (I always try for the simplest options in all my circuits!) You do have to remember to allow for sufficiently high voltage ratings on the later stage coupling capacitors.

As for adjusting final ouput voltages --- For coarse adjustments simply don't fit the coupling caps to the later stages ...... That way you can make a PCB layout to include all the stages, and then just fit the number of coupling capacitors to get the voltage mulipltication factor you need.
(The unused stages will drop a volt or two via the unused diodes still in the series chain, but that's not likely to be much of problem.

For fine adjustment, just fit a resistor in series with the DC supply to the IC, to drop the supply voltage to the overall circuit. (Probably a good idea to add a de-coupling cap after the resistor, to keep things 'tidy'..... Select the value to suit your needs.... (Typical values for that resistor in my schematics )

 

[ccaudle]

I'm not sure quite why you would choose to use more than one inverter for the oscillator

Perhaps to keep the oscillation frequency in a reasonable range with modern manufacture devices.
I am more familiar with the RC style feedback oscillators, where the R back to the inverter input has a C to gnd, and the time constant there sets the oscillation frequency. The C from the second inverter provides a delayed same polarity pulse back to the input, does that in conjunction with the resistor from the third inverter set the time constant? Otherwise if it is just the delay through three inverters setting the oscillation frequency there will be a large variation with temperature and probably a noticeable variation with manufacturing lots or device vendor.

Probably a good idea to add a de-coupling cap after the resistor

Definitely. Has anyone ever measured the power supply noise one of these circuits generates? CMOS logic is notorious for having current spikes on the power supply, and I assume most of these in DIY applications are not on PCBs with poured ground and power planes, low inductance capacitor footprints, etc.

 

[Murdock]

So this one should work?

 

[rogs]

Looks OK -- don't forget to check that capacitors C108 - C117 have a high enough voltage rating.

I see you are following Jules' design and going for a regulated supply to the op-amp, and a full differential audio output.
Higher current drain and slightly reduced headroom, plus a couple of extra dB of noise from the resistors in the inverted amplifier output -- but should work fine.

 

[rogs]

Perhaps to keep the oscillation frequency in a reasonable range with modern manufacture devices.
I am more familiar with the RC style feedback oscillators, where the R back to the inverter input has a C to gnd, and the time constant there sets the oscillation frequency. The C from the second inverter provides a delayed same polarity pulse back to the input, does that in conjunction with the resistor from the third inverter set the time constant? Otherwise if it is just the delay through three inverters setting the oscillation frequency there will be a large variation with temperature and probably a noticeable variation with manufacturing lots or device vendor.

I think some of the notes in this application paper explain things quite well: https://www.changpuak.ch/electronics/datasheets/AN-118.pdf
They show a single inverter oscillator when Schmitt trigger inputs are available -- and I personally think that's the way to go.

You still have to take into consideration the variations that will occur from using different supply voltages - and different Schmitt thresholds from different manufacturers -- but you only need one inverter for repeatable results, once those variables are factored in.

If you don't have access to Schmitt input inverters, then a multi stage solution will almost certainly give better results with things like duty cycle control and predictabily of oscillation....