A very versatile input stage for SDC mics
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The octava circuit is comparable in certain aspects, here a table with some values:
Item Octava 012 MicUlli
supply current 2,03 mA 2,01 mA
polarisation voltage 41,0 V 39,3 V
input impedance 600M, 7 pF 6G, 0,4 pF
max. output @ 1K5 load 1,8 V 2,1 V
gain (33pF capsule) -1,7 dB -0,3 dB
noise (A curve) -115 dBV -120 dBV
component count 11R, 8C, 2T, 0D 8R, 5C, 2T, 1D
gate capacitor required yes no
The main differences in the octava 012 circuit compared to my proposal are the absent bootstraps for the jfet drain and the polarisation resistor. Therefore input impedance and gain are lower. Octava needs a gate capacitor and of course 2 high ohmic resistors. For noise analysis they have to be considered in parallel resulting in approx. 5 dB higher noise level. The slightly higher polarisation voltage of octava can not compensate for the gain loss.
Conclusion: you can save 5 components while getting >1 dB more capsule sensivity and >5 dB more SNR
Best regards Ulli
Item Octava 012 MicUlli
supply current 2,03 mA 2,01 mA
polarisation voltage 41,0 V 39,3 V
input impedance 600M, 7 pF 6G, 0,4 pF
max. output @ 1K5 load 1,8 V 2,1 V
gain (33pF capsule) -1,7 dB -0,3 dB
noise (A curve) -115 dBV -120 dBV
component count 11R, 8C, 2T, 0D 8R, 5C, 2T, 1D
gate capacitor required yes no
The main differences in the octava 012 circuit compared to my proposal are the absent bootstraps for the jfet drain and the polarisation resistor. Therefore input impedance and gain are lower. Octava needs a gate capacitor and of course 2 high ohmic resistors. For noise analysis they have to be considered in parallel resulting in approx. 5 dB higher noise level. The slightly higher polarisation voltage of octava can not compensate for the gain loss.
Conclusion: you can save 5 components while getting >1 dB more capsule sensivity and >5 dB more SNR
Best regards Ulli
I just build this circuit using fetless electret, bfw10 fet, bc327-40, omitting Rg and R1, raised R5 to 65k ( ltsp simulation showed more even consumption through 6k8 P48 resistors), and raised R2 to 520k. Seems to work (listened through headphones), got some hum because almost everything is one board, but very interesting. So no 2G resistor necessary.
Are there any drawbacks that I am not taking into consideration, (outside some more signal with the 2G), Ulli?
Are there any drawbacks that I am not taking into consideration, (outside some more signal with the 2G), Ulli?
k brown
Well-known member
You changed the schem considerably since first posting it - what was the story there?
First schem posted looked like nothing I'd seen before - now it looks very much like the 012.
First schem posted looked like nothing I'd seen before - now it looks very much like the 012.
Then the FET's gate is floating, isn't it?
Do you mean omitted or shorted?
Is it? I don't see much difference between the actual circuit in post #1 and the one I had simmed earlier.
Hi Erik,
very interesting variant
Some points considering:
1. BFW10 is well suited for RF circuits, is noisy at low frequencies and has a very high leakage current.
2. Omitting the gate resistor means loosing control of the gate voltage and therefore not recommended.
3. Changing the component values in the circuit will probably lead to poor CMRR and incorrect current matching.
You should be aware of these points, but it is completely okay when you feel good with your solution
Best regards Ulli
very interesting variant
Some points considering:
1. BFW10 is well suited for RF circuits, is noisy at low frequencies and has a very high leakage current.
2. Omitting the gate resistor means loosing control of the gate voltage and therefore not recommended.
3. Changing the component values in the circuit will probably lead to poor CMRR and incorrect current matching.
You should be aware of these points, but it is completely okay when you feel good with your solution
Best regards Ulli
Then, how do you explain it works? You know the FET's gate needs to be galvanically connected. If not, the operating point is not stable, ending with the circuit locking.
If this is not what you see, that means there is a parasitic galvanic connection, which is not a good sign, because it's uncontrolled.
This is how I drew it in LTSP first, while experimenting with R3, and C7 being the capsule.
I now notice R3 is also 61k in the circuit. (My Roland Quad capture only delivers 44V P48)
I just measured DC to the left of R8, 38.4V and under R2 41.8 so there is a current draw difference.
Voltage at the Source of the fet is around 13V
I haven't tried lowering C5 yet in reality, just in simulation.
Edit: some more details.
C5 is 270n because that was on hand.
I omitted the 4n7 Caps, cause i had none here, but those will not allow it to not work for just a test.
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Is it stable? If yes, how do you explain it?
Hi Erik, I am a little bit confused while interpreting your measurements / simulations. Let me try to unterstand.
1. Voltage under R2 is 41.8V -> Current through R5 must be 0.32mA (@44V V2) or 0.91mA (@48V V2) -> voltage drop at R3 is 19.5V or 55.5V
2. Therefore Voltage Emitter Q1 must be 22.3V (@44V V2) or -7.5V (@48V V2) -> Only 44V V2 is logically assumable
3. 22.3V on Emitter Q1 means 21.7V at its Base. Neglecting the Base current leads via R7 and R10 to 76.9V at the left of R8 but you have measured 38.4V
4. 22.3V on Emitter Q1 and 13V at the source of the fet means R4 reverse biased.
Hope you have got my point: your measurement / simulation results are not consistent. As Abbey said: A Jfet without proper gate biasing is like a candle in the wind...
Best regards Ulli
1. Voltage under R2 is 41.8V -> Current through R5 must be 0.32mA (@44V V2) or 0.91mA (@48V V2) -> voltage drop at R3 is 19.5V or 55.5V
2. Therefore Voltage Emitter Q1 must be 22.3V (@44V V2) or -7.5V (@48V V2) -> Only 44V V2 is logically assumable
3. 22.3V on Emitter Q1 means 21.7V at its Base. Neglecting the Base current leads via R7 and R10 to 76.9V at the left of R8 but you have measured 38.4V
4. 22.3V on Emitter Q1 and 13V at the source of the fet means R4 reverse biased.
Hope you have got my point: your measurement / simulation results are not consistent. As Abbey said: A Jfet without proper gate biasing is like a candle in the wind...
Best regards Ulli
I did some more measurements. I must have measured at the wrong part for the jfet source. The voltage at the source of the fet is in the range of 26 to 35v, depending on time and will rise when I leave the hooks to the multimeter (fluke87) connected. Once I remove the hook from the source and remeasure it sits at a lower value, repeating this lowers it to around 26V. It seems like capacitive unloading of some sort. It is not steady when I measure it. But the capsule keeps on delivering sound. The base of Q1 is at 11.7 and the emitter at 12.5. Also there it is not consistent when i keep measuring at the jfet source from time to time.
Honestly, I don't know why it works. I started simulating this because I had a bfw10 on hand, and noticed in simulation it still acted as a source follower, with very little current going through the ac source, and without Rg. Since it is an electret, I just wanted to see if it would work without any polarization whatsoever.
Honestly, I don't know why it works. I started simulating this because I had a bfw10 on hand, and noticed in simulation it still acted as a source follower, with very little current going through the ac source, and without Rg. Since it is an electret, I just wanted to see if it would work without any polarization whatsoever.
One item with electret capsules is sometimes overseen. They have a "buildtin" polarization voltage (because of the so called charge influence). Without a resistor at the gate you end up with two problems. The first is an unstable circuit behavior, the second is that the gate voltage adds to (or subtracts from) the buildtin polarization voltage. This causes at least signal amplitude modulation depending on the circuit operating point.
Whenever you use electret capsules make sure whether the buildtin pol. voltage is positive or negative. If it is positive you will get more output with additional externally provided voltage. If it is negative you have to keep this externally provided voltage as small as possible. In this case my circuit will not be well suited. Then you might be happy with an alternative circuit (see attachment, gate voltage is 3.5V, same transistors as used in the first posted circuit). Generally you need Rg for proper operation.
BR Ulli
Whenever you use electret capsules make sure whether the buildtin pol. voltage is positive or negative. If it is positive you will get more output with additional externally provided voltage. If it is negative you have to keep this externally provided voltage as small as possible. In this case my circuit will not be well suited. Then you might be happy with an alternative circuit (see attachment, gate voltage is 3.5V, same transistors as used in the first posted circuit). Generally you need Rg for proper operation.
BR Ulli
Attachments
k brown
Well-known member
I was suggesting that the original post was edited at some point, and the schematic replaced with a different one.
Are you sure you understand how this works? Don't mean no bash what you wrote here, but i'm not sure you got this part right.
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Oops, I am pretty sure, pls see this threat post #37
https://groupdiy.com/threads/can-an...scott-dorsey-akg-c-3000-mod.23481/post-280984
The AKG developers know what they say
It is also my own experience that an additional polarization voltage changes electret capsule sensivity. Tried it with EM21 / EM23 Primo capsules, they benefit from the additional positive pol. voltage (4..5 dB more signal @ +40V pol. voltage)
Another well known guy (Siegfried Linkwitz) explained why -9V on a cheap electret capsule has the desired effect on output voltage
Comments welcome
https://groupdiy.com/threads/can-an...scott-dorsey-akg-c-3000-mod.23481/post-280984
The AKG developers know what they say
It is also my own experience that an additional polarization voltage changes electret capsule sensivity. Tried it with EM21 / EM23 Primo capsules, they benefit from the additional positive pol. voltage (4..5 dB more signal @ +40V pol. voltage)
Another well known guy (Siegfried Linkwitz) explained why -9V on a cheap electret capsule has the desired effect on output voltage
Comments welcome
rock soderstrom
Tour de France
My comment: very interestingComments welcome
Oops, I am pretty sure, pls see this threat post #37
https://groupdiy.com/threads/can-an...scott-dorsey-akg-c-3000-mod.23481/post-280984
The AKG developers know what they say
It is also my own experience that an additional polarization voltage changes electret capsule sensivity. Tried it with EM21 / EM23 Primo capsules, they benefit from the additional positive pol. voltage (4..5 dB more signal @ +40V pol. voltage)
Another well known guy (Siegfried Linkwitz) explained why -9V on a cheap electret capsule has the desired effect on output voltage
Comments welcome
"Whenever you use electret capsules make sure whether the buildtin pol. voltage is positive or negative."
I am refering to the polarization polarity you mentioned there. No doubt additional voltage will change sensitivity. Polarizing capsule with positive and negative voltage. You do understand what you said there?
I would add it is important to know if the polarization voltage is applied in series or in parallel to the capsule. And what is equivalent value in volts of the "baked in" charge.
There are several issues with Rossi's post, but we are not here about that. There are important caveats missing there, and some of the effects mentioned happen at extremes.
Rode NT1 capsule for example measures exactly the same at 50v and 100v. And most other capsules as well if they can take 100v.
If the pol. voltage is so high that it increases diaphragm tension (and it is allready tensioned with about 150+gr weight, so imagine how strong that additional force would have to be) you would have some way larger issues to think about than audible performance. This is true just for voltages that are close to those causing diaphragm to collapse.
For example if a diaphragm collapses at 70v, it will perform exactly the same with voltages between 10v and 60v. Noise issue being another topic.
If diaphragm colapses at 130v, it is more likely that arcing will melt it long before it collapses or changes tonality.
This is valid for dimensions used in usual ldc capsules of course. But you get the picture.
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k brown
Well-known member
Linkwitz's circuits don't apply -9v to the electret, but to the FET built into the capsules.Oops, I am pretty sure, pls see this threat post #37
https://groupdiy.com/threads/can-an...scott-dorsey-akg-c-3000-mod.23481/post-280984
The AKG developers know what they say
It is also my own experience that an additional polarization voltage changes electret capsule sensivity. Tried it with EM21 / EM23 Primo capsules, they benefit from the additional positive pol. voltage (4..5 dB more signal @ +40V pol. voltage)
Another well known guy (Siegfried Linkwitz) explained why -9V on a cheap electret capsule has the desired effect on output voltage
Comments welcome
It has been my assumtion for years that the Primo EM21/23/50 have been negatively polarized, because their output is inverted compared to other capsules using the same circuitry. Same with many of their mini capsules that have built-in FETs.
