Dimitri Danyuk's approach to P48 mic output

[homero.leal]

Some time ago I found this schematic from Dimitri Danyuk, proposing a new approach to a P48V mic output:


AFAIK this is the only schematic have seen which doesn't require the recommended matching of PNPs HFE value (LIke the Alice/Schoeps design), matching coupling output capacitor values (like some of the Zapnspark designs), or a transformer to provide the mic output.

My understanding is that it uses an Integrator (R2, R3, C3, IC1 and D1) to balance DC voltage levels at XLR2 and XLR3 lines, and the signal it's not fully balanced, I mean... the signal output is only at XLR2 while XLR3 remains at a fixed DC point.

While the DC voltage is balanced at XLR2 and XLR3, my main concern is... What about line impedance?

Anybody knows how to figure out output impedance for XLR2 and XLR3 lines? I have read that this is a very important factor to CMRR, and that's the reason of my question.

You could have a look at Dimitri's original article at:

https://www.edn.com/condenser-microphone-uses-dc-coupled-impedance-converter/

Thank you and kind regards!

HL

 

[Bo Deadly]

Impedance of pin 2 is R6 and then behind that Q3 emitter which is driven to low impedance but depends on impedance at base which is high at AC. Impedance of pin 3 is R7 and then behind that Q4 emitter which is driven to low impedance but depends on impedance at base which is low at AC.

Because Q3 and Q4 emitters are driven low impedance, I would say R6 and R7 are going to be dominant enough that using 0.1% resistors might actually make a difference in CMRR connected directly to a test rig. But the presence of 75R on each line is going to limit CMRR in practice because you want really low source impedance for great CMRR to minimize the influence of differences in the line and input. At least Schoeps doesn't have those resistors.

Stated another way, the 75R might be there specifically to make up for the difference in emitter impedance Q3 Q4.

Also the circuit is a little too clever. The JFET is self biased. It might be important to protect that gate with a guard trace. The op amp cannot be just any op amp either. The inputs are held at V+ so they have to be JFET input without any fancy protection circuitry on the inputs.

But it might have some endearing qualities that I'm just not seeing right now. Definitely would have to simulate to completion in LTSpice before doing anything else.

That's my first glance cursory impression anyway.

 

[abbey road d enfer]

I can just reiterate what I wrote in the Micbuilders group:

AFAIK this is the only schematic have seen which doesn't require the recommended matching of PNPs HFE value (LIke the Alice/Schoeps design), matching coupling output capacitor values (like some of the Zapnspark designs), or a transformer to provide the mic output.

It has no coupling cap after the FET, so both legs benefit from a very low drive source (note the Darlington between the FET's source and the output transistor).
The impedance is just about a few ohms more than the 75 ohm resistors. The impedance of the hot leg is constant with frequency, while the impedance of the cold one increases slightly at LF (90r @50Hz for the cold leg, about constant 80r for the Hot) due to the capacitive source impedance.

However, claiming that it does not require pairing the transistors is somewhat misleading, because it implies that unmatched transistors are the cause of BAD performance. Actually, that is a very common misconception.
I see people getting anal retentive about matching Hfe to a fraction of %, which actually does not result in better CMRR.
Here is why:
In a standard Schoeps/Alice circuit, the Hot and Cold legs are driven by different impedances. The only workable way to properly balance impedances is to make the output resistor on the leg driven by the FET's source slightly lower than the other and making the coupling capacitors large enough (470+nF).

In other words: unmatched Hfe of output transistors is not the primary cause for bad CMRR.

With the proposed circuit, it is true that the difference of output Z due to Hfe mismatch is probaly less that 3 ohms (even less if the transistors are in the same gain range), except at LF.
Remember that CMRR degradation is due to absolute difference between legs, not ratio. Adding equal resistors does not improve CMRR; they are here for stability with capacitive loads and EMI/RFI protection.

While the DC voltage is balanced at XLR2 and XLR3, my main concern is... What about line impedance?

The output impedance is dominated by the 75R resistors.

Anybody knows how to figure out output impedance for XLR2 and XLR3 lines? I have read that this is a very important factor to CMRR, and that's the reason of my question.

The simplest way to analyze this circuit is simulating it with Spice.

 

[dimitr1]

Thank you for the interest to this design. The purpose of the circuit was to omit dc blocking. It mates well with the dc coupled mike preamp, presented at the AES long ago.

 

[ccaudle]

dc coupled mike preamp, presented at the AES long ago

Do you have a reference for that preamp? Either paper number or author name.

 

[dimitr1]

A Novel Topology for a DC-Coupled Phantom-Powered Microphone Preamplifier
A new design for a microphone preamplifier is presented in which the differential gain is flat to dc, at the same time rejecting a large common-mode voltage.
Author (s): Chalupa, Rudolf
Affiliation: Classic Digital, Inc., Glenview, IL (See document for exact affiliation information.)
AES Convention: 87 Paper Number:2820

 

[dimitr1]

cannot download :-(, new improved website sends {"error":"error hash","access":false}

 

[thor.zmt]

Some time ago I found this schematic from Dimitri Danyuk, proposing a new approach to a P48V mic output:

View attachment 85840

AFAIK this is the only schematic have seen which doesn't require the recommended matching of PNPs HFE value (LIke the Alice/Schoeps design), matching coupling output capacitor values (like some of the Zapnspark designs), or a transformer to provide the mic output.

Adding a servo to existing designs will do the same thing.

TBH, if using modern transistors even mosfets from the same reel, matching is not required. I had enough occasions to test this in mass production.

BTW, using Mosfets in a "schoeps" design opens up a lot of possibilities, the biasing network can be made high enough value to allow the use small size non-polar coupling capacitors and Mosfet's are immune to source impedance mismatches etc...

What is more, I would only really sweat the DC balance with Transformer based input's.

And again, I hope the Phantom power resistors are hand matched 0.1% resistors. If we have a DCR of 35 Ohm and a 2% imbalance in currents (worst case for 1% 6k81 resistors) we are in trouble with our permalloy/mu-metal cored input transformer anyway.

Modern transformer-less input's don't really care much about some DC imbalance, as there are invariably coupling capacitors involved.

I remain perpetually perplexed that we do not see more DC coupled phantom powered microphone inputs but we do not, so even several Volt of DC imbalance is uncritical in this case.

The basic design of the follower with BJT as super pair bootstrapping the FET is not new. I saw it among others in 70's mic's from Gefell/Neumann ost.

It has the advantage that the voltage across the J-FET is substantially kept constant which avoids current pinchoff at very high SPL which sounds seriously bad. Again, if not expecting very high SPL or if you include a capacitive pad for high SPL's this becomes a non-issue.

My understanding is that it uses an Integrator (R2, R3, C3, IC1 and D1) to balance DC voltage levels

Commonly this circuit is called a DC-Servo. It is common.

at XLR2 and XLR3 lines, and the signal it's not fully balanced

This again is common with many microphones, Octava and Gefell/Neumann ost come to mind.

While the DC voltage is balanced at XLR2 and XLR3, my main concern is... What about line impedance?

R6/7 + the emitter impedance's of Q3/4 set the line impedance.

As there is no possibility to have the same current Q3/4 (due to current consumed by Microphone J-Fet and Op-Amp there will be a certain line impedance imbalance.

Q3 will see nominally 3.5mA & Q4 will see 3.8mA. So respectively one side will have around 82.43 Ohm impedance and the other 81.84 Ohm.

I suspect the resistor tolerance's in R6/7 and in the phantom power ballast resistors will swamp out this difference.

Anybody knows how to figure out output impedance for XLR2 and XLR3 lines? I have read that this is a very important factor to CMRR, and that's the reason of my question.

CMRR is a bit overrated IMNSHO.

It is more important in Microphones, however unless using very long cables and being in an electrically quite hostile environment in practice extreme levels of CMRR are unnecessary.

CMR (Common Mode Rejection) is useful only if there is any common to reject in the first place.

Proper system design minimises common mode noise, so CMRR is not very relevant.

You could have a look at Dimitri's original article at:

https://www.edn.com/condenser-microphone-uses-dc-coupled-impedance-converter/

EDN has many interesting articles. A more interesting from DD is this one:

Modified phantom-powered microphone circuit reduces distortion

Mind you, it is only of import if very long cables are used, which is rare these days.

What I found interesting in DD's article you reference is the overview of noise in Microphone J-Fet's, though this is for SDC capsules. It prompted me to buy a job lot of 2SK660 which is now stuck together with ton's of other stuff in the Chinese wherehouse.

A really interesting side for DIY microphones is here:

https://audioimprov.com/AudioImprov/Mics/Mics.html

Thor