LED peak meter with fastest transient detection (clipping indication meter)

[seva]

Here I am back with the numbers and the updated schemo (i forgot a few resistors in the ladder)

Only a few simple questions:

1. 18v comes from my stable psu and goes to detector stages- TL062 can handle that, right? Led Resistor R 58 has to be adjust for the current max? C4 can replaced by a trim? - is 20uF a good value for 500ms?

2. reff voltage - 18V goes to R29 30k and ladder 10k -divides the 18 to 4,5 ref  - Is it usefull to trim this value. I don´t understand this amount of ref exactly - when I wann switch between -150dBu and -151dBu what value should have the ref v ?

3. supply voltage (constant current source) for the comparator strings is realized by BC327 and R´s Is R50 100R -Ok for the 8LED´s?

4 Is the R trim (4,7k) in front of the detector accurate enough for my 9 half dB steps from 1,27 to 2,2v? I will try to calc it

 

[Andy Peters]

The old school 595 HCT logic shift register (8 bit) can sink or source current, so you could make an 8x8 LED array but the dedicated LED drivers like STP16CPC26 can only sink current... so I don't see a 16x16 array from a pair of them unless you add 16 high side switches to invert the drive polarity from the second latch.

Right, you need the high-side switches, but using otherwise unused micro port pins (which can source current) splits the difference. Depends on what hardware you have available. Circling back, a $1.50 micro that has an ADC and couple-dozen GPIO pins does it all, skip the 595 or whatever. The only extra parts needed are limiting resistors and op-amps to buffer the ADC inputs.

There are too many ways of doing this!

-a

 

[abbey road d enfer]

1. 18v comes from my stable psu and goes to detector stages- TL062 can handle that, right?

Yes.

  Led Resistor R 58 has to be adjust for the current max?

About 15mA is correct. There is almost nothing to gain by increasing current.

C4 can replaced by a trim? - is 20uF a good value for 500ms?

No need for a trimmer; you wouldn't notice the difference between 400ms and 600 ms. C4 has almost no action on hold time. In fact it delays the LED turn-on; I'm convinced you'de be better off without it. You'll have to experiment and make your choice. Hold time is mainly governed by C6, R54 and R59. Again you'll need to experiment.

2. reff voltage - 18V goes to R29 30k and ladder 10k -divides the 18 to 4,5 ref  - Is it usefull to trim this value.

No. Only one adjustment is needed; either the input trim (R12) or a reference trim.  But you may want to have a finer adjustment there, either a multiturn trimmer or a resistor at the bottom of the trimmer for reduced range.

  I don´t understand this amount of ref exactly - when I wann switch between -150dBu and -151dBu what value should have the ref v ?

??? Do you really expect measurements under the noise floor of the unit?

3. supply voltage (constant current source) for the comparator strings is realized by BC327 and R´s Is R50 100R -Ok for the 8LED´s?

Current in the CCS is 0.6V/R48; with 100R it's 6mA. I would decrease to 62R for 10mA in teh LED's.

4 Is the R trim (4,7k) in front of the detector accurate enough for my 9 half dB steps from 1,27 to 2,2v? I will try to calc it
[/quote] That depends on the actual levels you want to detect; again you may want to add a resistor in series with teh trimmer for a more spread adjustment range.

 

[seva]

Many thanks Abbey - you bring light in the dark

I will order parts and try it out.

The -150 to 151dBu Question is an example only. I try to understand what is the smallest v amount  what a comparator can handle to switch accurate. Increasing ref v = increasing dynamic range resolution - Its only important for accurate switching in the last steps of a log scale. Right? Is a 4,5 Reff V typical like a hole ladder resistance of (10k you told me).? Is there any rule that I can refer to? I wanna understand how to choose a good reff v in relation to the dynamic range- I know 150dB is really out of space. For my understanding I need only mV for a smaller scale. for example 3 steps 0, -1, -2dBU.!?

 

[abbey road d enfer]

Many thanks Abbey - you bring light in the dark

I will order parts and try it out.

The -150 to 151dBu Question is an example only. I try to understand what is the smallest v amount  what a comparator can handle to switch accurate. Increasing ref v = increasing dynamic range resolution - Its only important for accurate switching in the last steps of a log scale. Right? Is a 4,5 Reff V typical like a hole ladder resistance of (10k you told me).? Is there any rule that I can refer to? I wanna understand how to choose a good reff v in relation to the dynamic range- I know 150dB is really out of space. For my understanding I need only mV for a smaller scale. for example 3 steps 0, -1, -2dBU.!?

You want the level at the last node of the resistor chain to be significantly higher than the offset voltage, which is 2mV for the LM339. Let's take a practical example; with 4.5V reference, that would correspond to the maximum level, and you want the minimum level 40dB down, that would be 45mV, which is in conformity. 46dB down would compute to 22mV, which is ok for unambiguous detection. I would think the minimum for unambiguous detection would be about 6mV, corresponding to about 57dB down. However other noise issues could happen there, such as offset voltage in the rectifier.

 

[seva]

I am trying to build up some of my board in eagle. Eagle gives me an error for the grounding of the detector stage, not sure if i understood this circuit right so i have attached the layout again.

Input ground has connection to the negative supply voltage- is that right?

here is the web schemo:

 

[seva]

here is my eagle schemo:

 

[seva]

first board of the double stage detector- hide top layer:

 

[abbey road d enfer]

I am trying to build up some of my board in eagle. Eagle gives me an error for the grounding of the detector stage, not sure if i understood this circuit right so i have attached the layout again.

Input ground has connection to the negative supply voltage- is that right?

here is the web schemo:

You have modified the original schemo from single rail to dual rails. Signal ground should not be connected to -V rail.

 

[seva]

thanks abbey!

 

[abbey road d enfer]

thanks abbey!

You have the + and - input pins reversed!

 

[seva]

Oh yeah, thanks! basics break my neck :'(

 

[JohnRoberts]

Oh yeah, thanks! basics break my neck :'(

I haven't followed every iteration but  working backwards from the output stage the power supplies seem reversed.

As drawn current will flow from top to bottom, so +V should be up top and -V down on the bottom.

The input bias string is correct as drawn, but if you reverse the rails do not reverse this.

I am not sure what R62 and C8 are doing for you.

JR

 

[abbey road d enfer]

Oh yeah, thanks! basics break my neck :'(

I finally took the time to do a sim with LTspice. I used TL07x since I don't have a working model for TL06x.
The attack time is way too long; C4 alone makes 25ms.
If I delete C4, the time-constant is then governed by R53/C6 and R54/59. With the actual values it's 4.5ms.
It is partially due to the limited output current TL07x can supply; no doubt that it would be worse with a TL06x. OPA2134 may be better in that respect.
Now the hold time is not that great either, with about 30ms for decay to 25%.
I think you may want to consider using a JFET MOSFET instead of a bipolar transistor, then the discharge path R54/59 could be scaled about 10-20x in order to achieve the desired 500ms.
Pls see attached. Sim says 0.1ms attack time 500ms hold.

 

[seva]

nice, thank you so much

I will use OPA2134 instead of the TL0xx´s and use 2N7002 instead of the BC547. To get 0.1ms attack time 500ms hold - I will use the same values like you did it in TLSpice.

There is no need for Elkos, gounding, input RC - OK - i removed it all.

here is the new board. It looks much better now. Top layer will be done by cables.

 

[seva]

I am looking for the led´s right now. I am not sure about intensity and angles . Do you think 15 is a good angle?, 30 maybe better? Led´s domes will place 1-2mm through the holes of the frontpanel, so i thing 15 is OK.

I think i will take blue color for clipping detector. Hard to find a diffused finish of 5mm led´s. Do you have a tip for me how to choose the right led types? Is a diffused type fancier than a painted type? Glossy is not interesting, i think so.

How much light intensity is a good value (mcd) for LED´s using for meters, in general? Any idea for a intensity trim in this circuit?

 

[seva]

found that:

https://learn.adafruit.com/all-about-leds/what-are-leds-used-for

 

[seva]

found many answers here:
https://groupdiy.com/index.php?topic=534.0

I can´t find 5mm diffused green or red LED with around 1000-1500mcd. Only found blue with 1500mcd- so idea is to use the yellow and red with 1000mcd for the comparator stage and trim the blue leds in the detector stage that intensity matches.

LED Blue 1500mcd
593-VAOL-5LSBY2
LED Red 1000mcd
604-WP1503SRD
LED yellow 1000mcd
604-WP7083SYD/J3

 

[Andy Peters]

Hi GroupDIY

I would like to build up a 40 LED peak/vu meter bargraph with the most accurate peak detection over the last 10 LED segments in precise half dB steps. So the idea is to combine two stages of meters.
Please help me

For what it's worth, we had this discussion eight years ago. See here.

I dug this up because I'm implementing a meter for an ADC. I had this brilliant idea: the design already has a micro which has an I2S port, so I'll just route the ADC's BCLK, LRCLK and data lines to the micro and magically the ADC data will be in the micro and I can do math on it, and then drive meter data out to LEDs using SPI to one of the serial latches JR was talking about.

The problem? The I2S slave port on the micro I chose would not allow for sample rates faster that 48 kHz. (The limitation was on the input BCLK rate.) OK, that sucks, maybe there's a micro with an I2S slave port that can support 192 kHz. There is, an ST part, but it's big and relatively expensive and complete overkill for the design.

OK, what about implementing I2S in an FPGA or CPLD and gluing it to the micro (over SPI, or over a parallel External Memory Interface bus)? Even small FPGAs are too big.

But wait! Lattice has their Mico8 8-bit processor you can synthesize, and a $6 MachXO2 device will have more than enough space to implement the custom logic and the Mico. And you can write the Mico firmware in C!

But good christ the tools are complicated! Didn't I learn my lesson doing Xilinx EDK and MicroBlaze? YES I DID.

And then I had a thought -- this is deja vu all over again. Didn't I already implement a meter in an FPGA? YES I DID. Deep in the dusty corners of my Subversion repository was a design that never got built, which included a peak- and average-display meter section, all in VHDL, which was prototyped on a Xilinx Spartan3AN. I check the code out of the repo, look through it, and my comments looked familiar. "Didn't I discuss this on the GroupDIY forum?" YES I DID, in the thread noted above, in 2009. My code header comments include a date, which is a couple of months before the thread.

So project for the next couple of evenings is to port the code over to Lattice (not too hard, most of it is just VHDL), rig up an I2S source and test it all on a $20 dev board.

(Why Lattice? Cheaper than Altera MAX 10. Not by much. Neither Xilinx nor Microsemi has anything this small and cheap.)

 

[seva]

Thanks for all the info. The next meter I will build is a digital.

I have managed the circuits so far.

I have only a small problem with the rectifier stage for the comparators.

If no signal is present I measure on the output peak: DC30mV, output RMS has DC70mV. The lower LEDs light up when there is no input signal. My operating voltage is 17v Vcc +, 17V- Vcc-.

I'll try to supply the IC with less operating voltage. I have seen that in the Soundcraft circuit still 100R resistors are placed in front of the inputs of the IC Vcc.

Can someone help me why DC is measured on the outputs?