clintrubber
Well-known member
Something for which the coin doesn't drop at the moment:
Here's a one-quadrant multiplier circuit:
http://www.google.com/patents?id=NwEfAAAAEBAJ&dq=4999521
http://www.pat2pdf.org/patents/pat4999521.pdf
Inputs are the voltage on node A (or the I_0 input-current)
and the voltage on node C.
Current I_2 is the resulting output (or mirrored & then taken from device 8)
So the basic idea is straight on: the opamp makes V_A & V_B equal, so it realizes an output-current that's scaled by device #1 (a FET in triode-region, so a voltage controlled resistor).
But then it goes on by adding device 14 & 16 & the current source 15.
The text states:
Wrong time of the day here, the coin doesn't drop how that 14,15,16-add-on makes the input-requirement for device #1 more friendly. What's the trick here ?
Thanks / regards,
Peter
PS
Note that the drawing & text mess-up V_D & V_0 a bit, but these are meant to be the same.
Here's a one-quadrant multiplier circuit:
http://www.google.com/patents?id=NwEfAAAAEBAJ&dq=4999521
http://www.pat2pdf.org/patents/pat4999521.pdf
Inputs are the voltage on node A (or the I_0 input-current)
and the voltage on node C.
Current I_2 is the resulting output (or mirrored & then taken from device 8)
So the basic idea is straight on: the opamp makes V_A & V_B equal, so it realizes an output-current that's scaled by device #1 (a FET in triode-region, so a voltage controlled resistor).
But then it goes on by adding device 14 & 16 & the current source 15.
The text states:
The input voltage V_0 is supplied to node C via a transistor 14 acting as a transmission gate element. The transistor 14 is coupled in parallel with a further transistor 16 connected as a diode and supplied by a current I_T.
This configuration allows the voltage V_0 whose value varies between 0 and that of the supply voltage V_DD applied to the second reference line to control the value of the output current at node D in the range between approximately 0 and a value determined by I_0 regardless of the threshold voltage of transistor 1.
Wrong time of the day here, the coin doesn't drop how that 14,15,16-add-on makes the input-requirement for device #1 more friendly. What's the trick here ?
Thanks / regards,
Peter
PS
Note that the drawing & text mess-up V_D & V_0 a bit, but these are meant to be the same.