Nova/Groove Tubes/Sterling mod questions

[Khron]

I'm attempting to use Ltspice, but I'm having issues. I'm not exactly familiar with transistor circuits so I'm not getting any information that to me is useful (as I'm sure the information I'm entering is wrong too). Again, possible to help with that? It's not simple like using calculators and etc to figure a plate bypass capacitor in a tube circuit. Any help with the plots for those capacitors would be great.

How about attaching a screenshot with how far you got?

 

[Amled87]

How about attaching a screenshot with how far you got?

I'm attempting, but every time I take a screenshot it's a blank screen, haha. I'll see if I can get it worked out. I've switched over to another sim and it to doesn't work (or show rather) the HF change when adding the 1000pF cap, yet i can clearly hear/see it with a spectrum analyzer in my daw. Possible you could do math, I understand the "benefit" of learning/doing it myself though, but it would be much appreciated and I'm sure others in the thread would benefit from the information.

 

[Khron]

I'm attempting, but every time I take a screenshot it's a blank screen, haha. I'll see if I can get it worked out.

Worst case, take a photo with your phone, jeez "Where there's a will, there's a way"..?

And what signal / what circuit node are you probing, that no HF change is visible?

 

[Amled87]

Probing the input/out of the fet. I'm new to splice and had to have help previous experimentation I had done. I'd use my phone, but it wouldn't do no good with a bad camera. I do believe I've got it now though. But, still simulating it isn't helping me understand the math.

In a 12ax7 gain stage (100k plate and 2k7/.68 cathode followed by a 1m pot) I understand that adding say a 500pf cap to the plate adds to the millier capacitance of the stage and that has a 3db point of 5-6k with further drop-off above that. But, how do I translate that here using the fet gain stage (effectively what I'm doing with the 1000pf cap is adding to the miller capacitance of the fet, no?)

 

[Khron]

But, still simulating it isn't helping me understand the math.

Not sure why you'd necessarily need "the math" - that sort of assumes that placing one single component in a spot in a circuit affects one parameter and one parameter only. Or if it doesn't, the math behind the complete effect might be convoluted, and likely arguably irrelevant.

Me, i couldn't give two hoots about the math - if 1nF gets me where i want/need, great. If not, what does 2nF do? Or 470pF?

Just saying that practice beats theory any day of the week

 

[Amled87]

Not sure why you'd necessarily need "the math" - that sort of assumes that placing one single component in a spot in a circuit affects one parameter and one parameter only. Or if it doesn't, the math behind the complete effect might be convoluted, and likely arguably irrelevant.

Me, i couldn't give two hoots about the math - if 1nF gets me where i want/need, great. If not, what does 2nF do? Or 470pF?

Just saying that practice beats theory any day of the week

Oh I definitely agree about practice always winning out! The math comes from me wanting to understand exactly how what was chosen. Sometimes, it's not practical to continously solder on fragile traces or around sensitive components. If I understood the math better, in times when spice or another sim isn't available i could make decisions to based in the math. For example, this mic has a huge peak at 12-15k and "nasty" high-end doesn't even begin to describe it. If my model is right, the 1000pf has a 3db point at around 11k and significantly more above that. Out of curiosity does that seem right to you using the 1000pf cap?

 

[Khron]

Sometimes, it's not practical to continously solder on fragile traces or around sensitive components.

That's why we're happy to have simulators

Out of curiosity does that seem right to you using the 1000pf cap?

It was just an arbitrary value I pulled out of my a.. hat A starting value to work up from until you got the amount of HF attenuation your ears are pleased with.

 

[Amled87]

That's why we're happy to have simulators



It was just an arbitrary value I pulled out of my a.. hat A starting value to work up from until you got the amount of HF attenuation your ears are pleased with.

Ha! I wish it was much easier to figure like tube circuits. But, my question still is, by adding the 1000pf cap I'm essentially adding to the miller capacitance of the jfet thus moving the cutoff of the lpf created by the load resistor and miller capacitance down to a lower frequency, do I have that correct?

 

[Khron]

Ha! I wish it was much easier to figure like tube circuits. But, my question still is, by adding the 1000pf cap I'm essentially adding to the miller capacitance of the jfet thus moving the cutoff of the lpf created by the load resistor and miller capacitance down to a lower frequency, do I have that correct?

Pretty sure it's not. I thought Miller capacitance occurs between plate and grid, or drain and gate. A capacitor in parallel with the plate / drain resistor only looks like a lower resistance with increasing frequency, thus lowering the gain coming out the plate / drain.

 

[Amled87]

Pretty sure it's not. I thought Miller capacitance occurs between plate and grid, or drain and gate. A capacitor in parallel with the plate / drain resistor only looks like a lower resistance with increasing frequency, thus lowering the gain coming out the plate

Ah, you're correct. Miller capacitance is the capacitance between the gate and drain multiplied by the gain stage of the amplifier in a jfet circuit. I wasn't thinking lol. Too early and not enough coffee! Adding the cap across the drain is just shunting highs to ground. We could also add a cap between the gate and drain to increase the capacitance (which is around 8pF for 2sk30A in the mic) and the lpf it creates when the capacitance is multiplied by the gain of the stage instead of adding a cap to just the drain. More testing to do to see which I like best!

Now, to figure out how to calculate the gain of the jfet (not familiar with transistor circuits being honest) it's effect on the Miller capacitance and what the roll-off is for that. I know the 2sk30a has an capacitance of roughly 8pf, so that multiplied by the gain stage must not be to high seeing as the mic itself has a huge 12-15kHz peak (thus the lpf formed by the Miller capacitance isn't in that range and must be higher) I'm assuming.

 

[Khron]

Adding the cap across the drain is just shunting highs to ground.

Why ground? Neither end of that capacitor is connected to ground. In case i haven't beel clear enough, my suggested solution is adding a capacitor in parallel with the drain resistor. Doodle it on some paper in case it eases understanding, perhaps? Some people are more "visual" - myself included, in some circumstances.

We could also add a cap between the gate and drain to increase the capacitance

No, that's just gonna reduce the overall gain. See KM84 schematic and U87 ("vintage", non-A) schematic.

Just forget about the whole Miller capacitance thing, it's not relevant in these cases.

 

[Amled87]

Why ground? Neither end of that capacitor is connected to ground. In case i haven't beel clear enough, my suggested solution is adding a capacitor in parallel with the drain resistor. Doodle it on some paper in case it eases understanding, perhaps? Some people are more "visual" - myself included, in some circumstances.



No, that's just gonna reduce the overall gain. See KM84 schematic and U87 ("vintage", non-A) schematic.

Just forget about the whole Miller capacitance thing, it's not relevant in these cases.

The drain resistor is connected to the DC supply which would be no different than a plate bypass capacitor shunting highs to ground in a tube circuit, no? The capacitor across the drain resistor has to shunt the highs somewhere or it wouldn't be doing anything? Or am i putting to much thought into it?

Reducing gain at certain frequencies is exactly what a lpf does, is it not? I'm confused here. The 3db point of a lpf is the point at which gain is reduced by 3db at the given frequency. I'm not saying changing miller capacitance and bypassing the drain resistor offer the same effect, but both would cut high end, no? Cutting gain at 10kHz is still reducing high-end, no? Miller capacitance wouldn't matter so much because the input is such high impedance here though.

 

[Khron]

Or am i putting to much thought into it?

Yes, I'm afraid you are

Now, to figure out how to calculate the gain of the jfet

It's not all that straightforward, but it ends up as some factor of drain resistor divided by source resistor. With a capacitor bypassing the drain resistor, that total "drain resistor" impedance drops with increasing frequency. So if you had, say, 20dB of gain @ 1kHz, you might only have 15dB @ 20kHz.

I'm not saying changing miller capacitance and bypassing the drain resistor offer the same effect, but both would cut high end, no?

Well, no. It's the difference between applying a (1st order) low-pass, versus turning down the entire preamp gain, ie reducing ALL frequencies. Surely you agree that's nowhere near the same thing, right?

 

[Amled87]

Yes, I'm afraid you are



It's not all that straightforward, but it ends up as some factor of drain resistor divided by source resistor. With a capacitor bypassing the drain resistor, that total "drain resistor" impedance drops with increasing frequency. So if you had, say, 20dB of gain @ 1kHz, you might only have 15dB @ 20kHz.



Well, no. It's the difference between applying a (1st order) low-pass, versus turning down the entire preamp gain, ie reducing ALL frequencies. Surely you agree that's nowhere near the same thing, right?

I do agree, and I in no way want to come off as being rude, so please don't take my questions or responses that way. I'm just here to learn, and without asking questions I won't. I can simulate (sometimes lol) and work til I'm blue in the face at my computer, but I learn better with hands on experience. The technical aspect and what the capacitor across the drain resistor is doing I understand, its cutting highs, but the understanding of why and how to figure that out without being at my computer to me seems beneficial too. I have more issues trying to draw out a circuit with LTspice and see what changes do, than I do actually sitting down and getting the iron hot. I still don't think the model I had drawn up is correct, to me it seems (the simulation I had showed the 1000pF cap across the 47k drain resistor was attenuating around the 10-11kHz range if my simulation was right, but i doubt it was). I'm still new to simulations, usually what I work with is simple (sometimes a little more complex) tube circuits and I always have access to different calculators and a wealth of knowledge from not only members here (through skimming through posts) but Aiken, Rob P, Gyraf (one some of his tube style designs) and etc. Getting my head wrapped around transistor (rather BJT's, JFET'S, Mosfets and etc) has been where my biggest learning curve has been. I do appreciate all the help you've provided and the knowledge you've shared with me. I'll be putting in my order for two ORW87 boards and the BOM this week and can't wait to get started on those soon!

For now though, I'd really like to make these ST151's not as unpleasant, but even with the (like I said I'm sure incorrect modeling and 1000pF across the drain resistor) reduction of high-end (I may end up adding another cap to get it closer to 2n2 and cut more highs) I feel the 4-5kHz peaks shown in the graph earlier, may also be an issue with sibilance in these mics. Just wish someone would help with the sim and double check if the 1000pf really is cutting the 10-11kHz range.

 

[Khron]

I do agree, and I in no way want to come off as being rude, so please don't take my questions or responses that way. I'm just here to learn, and without asking questions I won't.

Can't recall where i read it (aaaaaaages ago), but "the only stupid questions are the ones that remain unasked" And on the bright side, at least you're receptive to input (as opposed to some other characters that come to mind)...

(I may end up adding another cap to get it closer to 2n2 and cut more highs)

That's why i mentioned

For HF attenuation, you could just add a capacitor in parallel with R5; start at 1nF and work your way up from there.

I still don't think the model I had drawn up is correct, to me it seems (the simulation I had showed the 1000pF cap across the 47k drain resistor was attenuating around the 10-11kHz range if my simulation was right, but i doubt it was). I'm still new to simulations,

(This is basically what the JFET stage in this mic circuit is)

 

[Amled87]

Can't recall where i read it (aaaaaaages ago), but "the only stupid questions are the ones that remain unasked" And on the bright side, at least you're receptive to input (as opposed to some other characters that come to mind)...



That's why i mentioned






(This is basically what the JFET stage in this mic circuit is)

Well, its definitely counter productive to come asking for help and insight and then ignore any information given. I'll never do that and I'm thankful for all ideas, comments and even criticism I get. The whole point is to learn and I've been lucky to have received some great information from here! I'll give my common source jfet simulation another go and report back. Looking at it from that way seems much more easy!

 

[Khron]

I'll give my common source jfet simulation another go and report back. Looking at it from that way seems much more easy!

Well, only now i skimmed through that video and while it is indeed informative and useful, it doesn't show the AC analysis simulation, which is what you want, for seeing the frequency response of the circuit.

This video on the other hand (despite its age and utter potato-quality) does show that:

 

[Khron]

The screw centers are 25 mm apart side to side and 35 mm apart lengthwise. The upper screws centers are 15 mm below the plate under the headbasket. The lower screws' centers are 20 mm above the top of the transformer.

Apologies for the late response on this - sheesh, that's pretty narrow! Even the Nova's mounting holes are ~27mm apart sideways - or at least that's where they're located on my boards

Then again one COULD consider bending the side-rails apart ever so slightly, to fit the above-mentioned spacing; length-ways it seems to be the same 35mm (as the Nova).

 

[Amled87]

Well, only now i skimmed through that video and while it is indeed informative and useful, it doesn't show the AC analysis simulation, which is what you want, for seeing the frequency response of the circuit.

This video on the other hand (despite its age and utter potato-quality) does show that:

Hopefully I've done this correctly. Here's what I got. Does this seem correct? That is with the larger 1.5nf input cap I'm using and the 1000pF cap across the 47k drain.