Shelf/bell topologies in SVF parametric EQs

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Makes sense. What about the switching for the shelf? Mind annotating that?
Oh i understand. Just do exactly what it says in the note below the schematic; the flying leads are there to grab. Don’t forget to release the ground tie and the 2K Rg from the output inverter if you use it as a HP buffer. Post #64…
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this is why we make schematics. im too lazy to parse those notes. at least put net names or something on them. (ie connect a to b).
Being older than I care to divulge, I have forgotten the pertaining demonstration. I wish someone could link me to it.
I remember seeing it in Sedra's book (not the ubiquitous Sedra/Smith book on Microelectronics, but the filter book), I will provide the derivation whenever I have a bit of free time.
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