Sziklai Output Power amp

[Moby]

I made few amps based on this schematics (call it clone :wink: ) because I really liked the sound of the original. Every time i had nasty oscillations what were solved with playing with caps values. this time I have no luck. I think that this is Sziklai output (correct me if I'm wrong) and It's one of disadvantages of that design. I would like to hear about your idea... What can i do to get rid of problems?
BTW, I can't find Sanken's models so on the sim schemo are much slower Onsemi substitute :?

Shot at 2007-08-11

Shot at 2007-08-11
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[JohnRoberts]

Wow... where to start?

Common emitter power stages are notoriously difficult to stabilize (IIRC Cherry published a paper in AES journal on that subject in '80s). The compound driver (combining an NPN driver with PNP power device to look like power NPN) was also a common problem in quasi-complementary power amps when used to make up for unavailability of true complementary power devices (due to speed difference between CE and CC stages).

That amp would be much easier to stabilize if you made the output common collector instead of common emitter. A second issue is temperature stabilization of class A bias current, I don't see any attempt to sense and correct for Vbe changes with temp.

Good luck and look out for thermal runaway when you get it biased up to eliminate crossover distortion.

JR

PS: I recall one common emitter power stage I did in a small one-off amp a couple decades ago. I had to slow it way down to make it stable. It worked but wasn't a good performer.

 

[Moby]

Heh, when works it works great... I don't even know where to start with this :?

 

[bcarso]

Do you have Q-killer R's in parallel with your 3uH output inductors? If not put 10 ohms across.

I agree with JR on the perils of the compound pair as output device. However the rewards if you can get them stabilized are interesting, namely the better swing to the rails without a second set of higher-voltage rails for the drivers.

I was tempted to do this direction when given the opportunity to redesign a client's amp recently, but I wound up taking a less dangerous path.

One of the secrets to such designs, beyond the basic stability against oscillations, is to prevent the output devices from saturating. They will "hang" for rapid output slewing and lead to potentially destructive output shoot-through current spikes.

 

[SonsOfThunder]

Whoosh, JR. I didn't catch that when I first looked at the schem. Eeek! I suppose this topo causes you to have to compensate the amp differently than normal and that is what that C7/R8 and C11/R11 business is all about. I'm not very familiar, but it looks like this just complicates matters for no good reason.

The first thing I noticed was the lack of a bias transistor. I agree with JR's assessment on that. I guess I don't understand how this has any bias really. Care to 'splain that one JR?

You may have heard a single unit that sounded good, but if you go trying to build more than maybe ten units (and those had better have output devices from the same production lot AND you gotta get lucky on the dynamic characteristics of the devices too), you are not going to get a good stable bias setting and thus the amp's THD is gonna change with temp.

I personally do not like power amps that use opamps for the front end. Too may things that you cannot control. It sure does simplify the topology though!

Those output devices are the same case size as the ones used in my Alesis RA-100, different device though similar specs. These are 35Mhz vs 20 and are 230V instead of 200V. But do you really need that extra 15Mhz? You aren't exceeding the voltage limit of the lesser device, maybe they would be less prone to oscillation too. 2SA1494/2SC3858.

HTH!
Charlie

 

[JohnRoberts]

The class A bias is set by voltage dividers from unregulated PS. So not only is it not temp compensated, it will vary with mains voltage.

Agreed with Brad, anti-sat clamps are good for any topology.

There is more than enough loop gain to get decent performance once stabilized, but bias approach looks pretty scary.

Regarding stabilization looking at the number of Cs and RCs purely to roll off gain hint at the difficulty of that balancing act.

One trick that I've used in similar topologies (opamp front end- followed by non-inverting overall gain stages) is to cap couple the output of the opamp to the very output.. At very high frequency the output stages will have a rising output impedance and phase shift. Of course this cap needs to be sized small enough to not bother the opamp's work at audio frequency, yet large enough to be useful (easier said than done). Since speaker load will damp this, series choke in output could be useful. :? I only offer this as food for thought not a serious suggestion.

To make a high performance amp, I'd start with a more friendly topology. To just get this working, slow it down, and under bias it to hopefully keep away from thermal runaway.

JR

 

[SonsOfThunder]

JR,

So just to make sure I understand, R6/R7 set the bias, yes?

If so, wow. You would think that this design would require a pot to set bias individually unless it is heavily UNderbiased. And I'm not smart enough to figure that part out.

Thanks for the explanation.

 

[JohnRoberts]

[quote author="SonsOfThunder"]JR,

So just to make sure I understand, R6/R7 set the bias, yes?

If so, wow. You would think that this design would require a pot to set bias individually unless it is heavily UNderbiased. And I'm not smart enough to figure that part out.

Thanks for the explanation.[/quote]

Yes R6/R27 set voltage of Q1 base, R7/R26 base of Q2. The asymmetry suggests an attempt to balance for input bias current of input opamp.

I suspect it is intentionally lightly biased, but Vb-e with temp changes at Q1 will be increased more than 2x at base of output drivers, and driver Vb-e change will also increase bias current 1x into .22 ohm degeneration resistors.

If severely under-biased, low level HF performance may be compromised by crossover distortion, OTOH if adequately biased for HF, and run hot, it could get even hotter, and release it's magic smoke.

At LF the speed and gain of the front end opamp will probably make up for under bias.

JR

 

[Moby]

Do you have Q-killer R's in parallel with your 3uH output inductors? If not put 10 ohms across.

Ye I have, Sorry I missed on the sim circuit. If I include under sim nothing special happen'.....

The class A bias is set by voltage dividers from unregulated PS. So not only is it not temp compensated, it will vary with mains voltage.

Agreed with Brad, anti-sat clamps are good for any topology.

Yes, It's biasing by R6, R7. That part of schematics or "cloning" was really unclear to me. If I try to put 130 at both sides situation seems better (again in sim). In the real world I'm sick of burning 10ohm resistors instead of fuses.... That's why I try to find idea by simulating. I'm afraid that I'm not able to modify this circuit to work properly. Any help is welcome. Thanks guys. BTW, if you are familiar with cirmaker I can send sch file. It will be more easier if I can see on schematics what you have in mind.
John , when you say anti-sat clamps are you talking about diode clamps instead of R6-R7 :?:

Those output devices are the same case size as the ones used in my Alesis RA-100, different device though similar specs. These are 35Mhz vs 20 and are 230V instead of 200V. But do you really need that extra 15Mhz? You aren't exceeding the voltage limit of the lesser device, maybe they would be less prone to oscillation too. 2SA1494/2SC3858.

I don't think that 15mhz will change something since I have an impression that instability is caused by topology, correct me if I'm wrong.
Also, clipping for this amp is really nasty and wired , yes I'ts really dangerous if it's overdriven. That's the second thing whats bothers me after oscillations. Any idea?

 

[Moby]

I'm not sure that I understand how to make compensation on the op-amp.
Something like this?

Shot at 2007-08-11

 

[JohnRoberts]

Yes topology is difficult to stabilize, as previously stated.

Yes, R6/7 will set operating current but will be very sensitive to transistor Vb-e s.

Change in Q1, Q2 Vb-e multiplied > 2x (51/22) at output + change in output devices.

If you are married to that topology, you could reduce the temperature sensitivity to Q12/Q2 Vb-e by cap coupling R20 and R22. Establishing the DC operating point of output driver bases by adding additional resistors from the emitters of Q1 and Q2 to the opposite rails would significantly reduce temp sensitivity.

You still have to deal with Vb-e of output devices. I don't see an easy way to temp comp them with a simple device junction. Perhaps a temperature dependent resistor in parallel with R22/23 (but I don't have a warm feeling about that approach)?

Simple anti sat clamps could be made with a couple of diodes. One in series with collectors of Q1/Q2 and other from those collectors to output device collectors.

JR

 

[Moby]

[quote author="JohnRoberts"]Yes topology is difficult to stabilize, as previously stated.

Yes, R6/7 will set operating current but will be very sensitive to transistor Vb-e s.

Change in Q1, Q2 Vb-e multiplied > 2x (51/22) at output + change in output devices.

If you are married to that topology, you could reduce the temperature sensitivity to Q12/Q2 Vb-e by cap coupling R20 and R22. Establishing the DC operating point of output driver bases by adding additional resistors from the emitters of Q1 and Q2 to the opposite rails would significantly reduce temp sensitivity.

You still have to deal with Vb-e of output devices. I don't see an easy way to temp comp them with a simple device junction. Perhaps a temperature dependent resistor in parallel with R22/23 (but I don't have a warm feeling about that approach)?

Simple anti sat clamps could be made with a couple of diodes. One in series with collectors of Q1/Q2 and other from those collectors to output device collectors.

JR[/quote]
Thanks. No,I'm not married to topology, I started this from curiosity and as I told you I liked the original. Sounded really precise and fast enough for critical studio listening. Also, i choosed this because of simplicity but seems that It's not so simple. I'm at the edge of giving up if I have to ruine only thing I liked - sound. I spent some time designing the boards, but that's not a problem, only thing I will like to keep is power transformers and transistor because it cost's a lot. So I'm welcome if somebody have some good sounding amp to build based on the +/- 74v and 2sa1295/2SC3264

 

[thermionic]

I can't seem to find the exact schematic /s (there are several revisions of each), so this is a lead rather than a direct suggestion, but - if you put those transistor numbers into the search at www.diyaudio.com you get several Krell projects come up - if that's useful to you... (they have PCBs by the look of it)

Good luck! You're not the only member here who's been struggling to stabilise a pwr amp this week...


Justin

 

[Moby]

Thanks. Yes I'm familiar with Krell projects at diyaudio.com. Nice PCB boards available.... To be honest, I never worked with Krells in studio. How it sounds? Which model you think will be close to my needs? I need this amp for my main speakers project. 2x12inch + 2x6.5 +tweeter per side. Let's say that I need at last 150w/8ohm project. Maybe some more....

 

[SonsOfThunder]

JR,

>>>cap coupling R20 and R22.

Just for clarity, you actually mean to cap couple R20 and R21, yes?

 

[Moby]

Huh, I'm little bit lost... Can you please draw it all possible solutions. I'm not sure what I have to do. Sorry. I will probably jump on some other Power amp project if it's impossible to fix this, but it will be great if I don't have to put this boards into garbage. I felt like I'm almost done but here I am stucked with oscillations

 

[JohnRoberts]

[quote author="SonsOfThunder"]JR,

>>>cap coupling R20 and R22.

Just for clarity, you actually mean to cap couple R20 and R21, yes?[/quote]

Yes R20 and R21...
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There should be a small DC voltage at that point so you can use a polar electrolytic cap.

FWIW once the DC operating point is set by those two new resistors, R20 and R21 could be replaced by only one 22 ohm resistor that is cap coupled with individual caps to both emitters of Q1 and Q2.

Further, diode clamps across these caps could eliminate the need for excessively huge values to handle LF, while still effectively isolating transistors from affecting idle current .

-----------

Looking at this design, the difficulty in easily temperature compensating output stage is that Q1 and Q2 are actually part of that output stage and drivers for the output devices that don't have enough beta to do the heavy lifting on their own.

By moving the drivers Q1 & Q2 out to the rails to make a darlington output stage, then adding another pair of small signal transistors where Q! & Q2 were to perform the level shift et al just at a much lower current, could allow for more conventional diodes in bias string. The downside to this is another stage of delay/phase shift to complicate stabilizing an already difficult general topology.
=======

An easier to stabilize approach would be to rearrange Q1-Q6 as a conventional common collector output stage, than rolling your own level shifter to convert opamp +/- 16v swing to useful +/- 75v.

I designed an amp back in early '70s that borrowed liberally from old BGW front end (opamp cap coupled to common emmiter level shift pair).
That amp was not great by todays standards, on the order of .2% THD at 20kHz, but still works. I suspect the distortion was somewhat limited by relatively slow output devices I chose for robustness (all large geometry NPNs with quasi comp arrangement to synthesize power PNP).
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You might want to do a search here for level shifting circuits for use with opamps to get +/- 75v swing. I recall several discussions here.

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Finally it is only another two small signal transistors to add current limiting to the output stage by sensing voltage drop across .22 ohm emitter degeneration resistors. Can prevent amp failures from shorted speaker cables or speaker voice coils.

There must be hundreds of power amp schematics published on the web. Unless they are heavily over compensated, or you copy layout package exactly, be prepared to tweak compensation for subtle differences between layouts.

Finally when designing power amps be alert to how and where currents flow. There will be ohmic voltage drops caused by these currents flowing that can cause errors, stability issues, and even distortion.

have fun...

JR

 

[Moby]

Thanks John.

An easier to stabilize approach would be to rearrange Q1-Q6 as a conventional common collector output stage, than rolling your own level shifter to convert op-amp +/- 16v swing to useful +/- 75v.

Yes, I agree, that will be the most easier, but I'm not sure that I can do that alone. If I can keep the mainboard with op-amp like it is designing new output board won't be a problem to me. But, I need schemo for that. Can you please draw me a new output schematics? I will appreciate that a lot. :thumb:

 

[JohnRoberts]

I actually get paid for doing design work.. surely much more than you're willing to pay (when I'm even looking for more work).

I am trying to mentor you toward learning how to do this yourself.

I have real work of my own to do. Today I'm writing a new operating manual.

JR

 

[thermionic]

Hey Moby,

In my experience, Krell amps tend to sound very colour-less, without much of a 'sound' to speak of - ideal for the studio IMO.

If you go down the Krell PCB route, do make sure to do a lot of searching for potential issues - otherwise you'll risk wasting a vast amount of time and effectively negating any cost saving (you don't save on DIY as a rule, but - providing you have a decent layout - pwr amps are one of the few things you can make a saving over commercial offerings - if your design is good to start with!).


Justin