Two discrete op-amps with differential I/O

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jdbakker

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Joined
Nov 24, 2005
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EDIT 20090914:

New version of the 'normal' differential I/O-amp. Re-biased the input stage, improved the CM amp, tweaked the compensation to improve HF distortion (now 27dB less third at 20kHz).

Original post:

Hi all,

Here are the first revisions of two discrete op-amp designs I've created for my work-in-progress discrete mic pre. Both were strongly inspired by Bruno Putzeys' AES paper on balanced building blocks.

Number one is a simple two-stage voltage feedback diff-I/O amplifier. Its VAS and output stages are identical to the one in my current-feedback DOA. While the design is unity-gain stable (and even stable with open inputs), the schematic shows it configured for 20dB (x10) gain. In that configuration distortion is quite low: 3rd is at -190dBc for 1kHz and 35Vp output swing in 200Ω (says SPICE), which means that layout, interference and component imperfections will likely determine its performance. Distortion does rise at 18dB/octave and ends up at -124dBc @20kHz, but I can live with that. Noise figure at 200Ω input impedance is 1-1.5dB.

Random notes:
- the output stages idle at 30mA, total idle power consumption for the present bias settings is 5W. This may not be the best thing to stuff an entire console with.
- Q33/Q34 (bottom left) keep the output centered at 0V. Their presence (and loop bandwidth) affects common-mode rejection more than I had expected. Come to think of it, R26/Q40/Q22/R6(/Q30/R46) is a pretty weird way to draw a current mirror.
- another 'obvious when you think about it'-tidbit: the inductor across the input transistors' emitters does not just short out the emitter resistors' noise contribution within the audio band, it also reduces distortion by raising open-loop gain.
- in the final version I may replace the RC-network on the input of the VASes (R15+C6 and R40+C12) with one single RC between the bases of Q16 and Q29.
- the 2N5462s (cascodes for the input pair) are merely convenient placeholders; final version will probably use 2SJ74s but I had no model for those.

Number two is a direct implementation of Bruno's balanced line driver with floating outputs (pp3-4 of his paper). I must admit that when reading his paper I was very impressed by the concept of a current-output (transconductance) line driver, which would only get more stable with added cable capacitance, and which would do the right thing even with one of its outputs grounded. My implementation does perform in this way, with rather low distortion to boot (3rd at -158dBc when driving 24dBu into 600Ω). However, as it turns out while differential distortion is pretty low, there is a lot of even common-mode distortion (2nd at -55dBc when driving 24dBu into 600Ω). This means that receiving circuitry would need to have unrealistically high common-mode rejection, and a 1% error in the feedback resistors increases THD by 50dB! As far as I can tell most of this is caused by voltage-dependent behaviour of the output transistors, and while I expect this can be mitigated by adding more circuitry I am abandoning this circuit for the time being.

More random notes:
- eats ~14W. The upside is that the current consumption is virtually constant regardless of signal and load, which definitely reduces interstage coupling.
- the complementary feedback pair on the input LTP (Q1/R22/Q18 and Q2/R23/Q17) reduces distortion by about 10dB at the cost of a very small increase in noise and some loss of speed. Does anyone know of other amplifiers employing this technique?
- the paralleled current source transistors could have been replaced by one single higher-current transistor, but I wanted to limit the number of different semiconductors used in the mic pre.

Thoughts?

JDB.
 
The 2N5462s (cascodes for the input pair) are merely convenient placeholders; final version will probably use 2SJ74s but I had no model for those.

I'm not sure why you'd want a low noise part for the cascoded--low C is probably far more important.

Does anyone know of other amplifiers employing this technique?

See some Halcro patents; they also show means to further improve the linearity e.g. by replacing R22/R23 with a CCS each.

Have you tried what happens if you make the CM amp (micpre-diffio-r1.0.gif) a two-stage topology which allows decent compensation?

Samuel
 
Distortion does rise at 18dB/octave and ends up at -124dBc @20kHz, but I can live with that.

Hm, -124 dB, I might hear that :p. But it should be easy to make R1/R2 larger (perhaps up to 10x), with a corresponding reduction of C2/C3/C9/C10 or an inrease in tail current.

Samuel
 
jdbakker said:
...The upside is that the current consumption is virtually constant regardless of signal and load, which definitely reduces interstage coupling.

Does not understand this logic. Please explain!
My apologies for not contributing anything to your neat designs.
 
Constant current --> less rail polution... and warmer sound (=good in winter)


But seriously, man, you should use leds somehow. Red, yellow, green.. just imagine... RASTA pre's

8)

 
Samuel Groner said:
The 2N5462s (cascodes for the input pair) are merely convenient placeholders; final version will probably use 2SJ74s but I had no model for those.

I'm not sure why you'd want a low noise part for the cascoded--low C is probably far more important.

The J74 sprung to mind as it's the only highish-IDSS P-JFET in my parts collection. Come to think of it it's not exactly easy to get either; have any suggestions for ubiquitous low-C hi-IDSS P-JFETs?

Samuel Groner said:
Have you tried what happens if you make the CM amp (micpre-diffio-r1.0.gif) a two-stage topology which allows decent compensation?

Not yet, can do so tomorrow if I get some time for SPICEing. But why would I want a two-stage CM amp, considering that as drawn I have stability and 90-100dB of CM rejection within the audio band?

Samuel Groner said:
Distortion does rise at 18dB/octave and ends up at -124dBc @20kHz, but I can live with that.

Hm, -124 dB, I might hear that :p. But it should be easy to make R1/R2 larger (perhaps up to 10x), with a corresponding reduction of C2/C3/C9/C10 or an inrease in tail current.

...seriously? (disclaimer: it's 3AM here and I've had a movie and a few rather serious discussions about Life earlier this evening, so I'm not entirely sure how to interpret that smiley, for all I know you or others are actually able to pick up on -124dBc 60kHz content...)

Upping tail current does help. Doubling Q1/Q2 current with no other changes other than halving R6/R46 to keep the CM amp from clipping reduces the third harmonic @20kHz for a 35Vp output to -136dBc. Increasing the emitter resistors makes little difference though (<1% for a doubling), as at 20kHz the Z of L1 is still much smaller. Having a lower-ESR inductor does help; changing L1 from 47uH with 1.1Ω ESR to 22uH @0.55Ω (same family, same package) reduces third by 3dB to -139dBc.

...but do people really care? I mean, as drawn the highest third harmonic which still falls in the audio band (ie with a fundamental of 6.67kHz) will be at the miniscule level of -152dBc. Doubling input stage current (plus CM amp current) will increase power consumption by 12%, and considering that one single three-stage pre draws ~15W I am looking hard at ways to get the current consumption down. While I can still tune this in the proto, increasing first-stage current will force me to either move to larger devices or parallel parts in some places (which naturally affects the layout).

ChrioN said:
jdbakker said:
...The upside is that the current consumption is virtually constant regardless of signal and load, which definitely reduces interstage coupling.

Does not understand this logic. Please explain!

As tv hinted, it has to do with power rail pollution. If you combine a power stage which doesn't have constant current consumption with a power supply with nonzero output impedance (ie: any physically realizable supply), some signal-related distortion ends up on the supply lines, and from there can end up in other circuits powered from the same supply. This is especially bad in the case of mic pres which can have a lot of voltage gain between input and output. TV's 'warmer in winter' can be taken quite literally, as any constant current consumption stage must have its current set for the maximum signal level that can ever occur (worse than class A amps, even), and that can get pretty toasty dissipation-wise.

tv said:
But seriously, man, you should use leds somehow.

I know. I love LEDs for biasing (and basic troubleshooting). However the pre is intended as a My First SMD-DIY project, and one of my self-imposed limitations is that I can not use any SMD parts which can be assembled in more than one way. That eliminates all polarized two-terminal devices in a symmetrical footprint. The only LEDs left are those in SOT-23, and a search showed that those are getting harder to find at most convenient distributors. For this same reason I'm using duals in SOT-23 for all the regular diodes (thinking BAV99, as those are dirt cheap too).

Thanks all,

JD 'nap time' B.
 
Have any suggestions for ubiquitous low-C hi-IDSS P-JFETs?

Unfortunately not--the 2N5462 is probably the most easy to get. Or just use a BJT cascode at the cost of some more parts. Or why no NPN input? The rest is easily mirrored.

But why would I want a two-stage CM amp?

I'm basically just wondering if there's any benefit. I have done some simulations and IIRC there were some but I simply don't remember what it was.

Increasing the emitter resistors makes little difference though (<1% for a doubling), as at 20kHz the Z of L1 is still much smaller.

If you increase the emitter resistors you need to decrease the compensation capacitors to maintain unity gain frequency. I guess 22 pF will be enough with 330 Ohm emitter resistors. This will most certainly drastically improve distortion, and obviously slew-rate and GBW too.

...but do people really care?

Well, I think this is an unhappy argument in that context (i.e. at that complexity/performance level)... The point is that it can be improved (presumably) without any other ill-effect or a cost/complexity increase, so there seems to be little reason for not doing so.

As drawn the highest third harmonic which still falls in the audio band (ie with a fundamental of 6.67 kHz) will be at the miniscule level of -152 dBc.

Of course 20 kHz linearity does matter nonetheless because of IM distortion products which will fall inside the hearing range.

Samuel
 
Samuel Groner said:
But why would I want a two-stage CM amp?

I'm basically just wondering if there's any benefit. I have done some simulations and IIRC there were some but I simply don't remember what it was.

Implemented one in rev 1.1 of the diff amp. Doing so reduced HF distortion by 4-5dB, and improved CM rejection to ~120dB (from ~90dB) within the audio band. A side effect of this change is that I could reduce the current consumption of the CM amp to balance the increase in input pair tail current (see below).

Samuel Groner said:
Increasing the emitter resistors makes little difference though (<1% for a doubling), as at 20kHz the Z of L1 is still much smaller.

If you increase the emitter resistors you need to decrease the compensation capacitors to maintain unity gain frequency. I guess 22 pF will be enough with 330 Ohm emitter resistors. This will most certainly drastically improve distortion, and obviously slew-rate and GBW too.

I upped the input pair tail current to 5mA per transistor, reduced L1 to 22uH and increased the emitter resistors to 220Ω. The compensation capacitors are at 47p, as lower values appear to not be stable in this configuration without an RC across the VAS input transistors (R15/C6), which increases distortion. At 47p the RC network is not necessary (I've set R15 to 220k effectively taking it out of circuit), and this value for the compensation capacitor would appear to produce lowest distortion at 20kHz (-151dBc for an output amplitude of 35V @20kHz). Note that in either case the closed-loop unity gain frequency is determined by the capacitors across the feedback resistors (C4/C5, unity gain is at ~6.5MHz)

(Finding a nice stable operating point was No Fun At All, as the compensation of the main amp interacts with the response of the CM amp. It didn't help much that SPICE (predictably) failed to converge when the amp was almost stable. I briefly tried to work out a simplified pole-zero transfer equation for the amp but that led me nowhere fast.)

Samuel Groner said:
...but do people really care?

Well, I think this is an unhappy argument in that context (i.e. at that complexity/performance level)... The point is that it can be improved (presumably) without any other ill-effect or a cost/complexity increase, so there seems to be little reason for not doing so.

Sure, but at some point you need to decide that the thing's good enough, and that further tweaks only offer diminishing returns. In this case I had to make a component-level decision which would be awkward to change after the layout is done, so I was trying to determine whether it would be worth it.

Samuel Groner said:
As drawn the highest third harmonic which still falls in the audio band (ie with a fundamental of 6.67 kHz) will be at the miniscule level of -152 dBc.

Of course 20 kHz linearity does matter nonetheless because of IM distortion products which will fall inside the hearing range.

True, but IM performance wasn't that bad to begin with. I've done a two-tone IMD test with equal-level 19kHz and 20kHz sines (scaled so that the maximum waveform amplitude would work out to be 35V). The original design had a 1kHz intermodulation product at -161dBc, whereas the new version reaches -171dBc. Predictably the improvement for the IM component at (2f1-f2) or in this case 18kHz is larger: -131dBc for the original design versus -159dBc for the new revision. Naturally this improvement matches the reduction in third at 20kHz between the two versions (-124dBc vs -151dBc).

Thanks again,

JDB.
 
Two more notes:

* With the ~47 pF compensation you'd want to double R5/R35. But this is anyway something which needs verification in real world.
* I suggest you include a TBD series resistor for C3/C10. Often SPICE is somewhat optimistic with respect to phase margin and this gives some freedom in solving such an issue. This applies to the front-end as well.

Do you build the prototype with all three stages or one after another?

Samuel
 
One (possibly obvious) issue I forgot to mention:

jdbakker said:
[...] improved CM rejection to ~120dB (from ~90dB) within the audio band [...]

As this is an amp with differential inputs and outputs, I should have said what this is referred to. The -120dB figure is the attenuation of common-mode input signals to common-mode output. The rejection of common-mode input signals to differential-mode output is >200dB assuming perfect component matching and will in reality be determined by the (mis)matching of the feedback network.

Samuel Groner said:
Or why no NPN input? The rest is easily mirrored.

Parts choice again. I want the front-end to have a PNP input so that the bias voltage on the input can be somewhat negative to keep the Phantom caps formed/polarized. I would prefer to give people the option of having the same (input) transistor pair for each of the stages. Besides, I have a few hi-hfe NPN parts I'd like to try in the VAS. I admit none of these are very major factors, but given that the 2N5462 appears to be readily available I think I'll stick with those.

Samuel Groner said:
* With the ~47 pF compensation you'd want to double R5/R35. But this is anyway something which needs verification in real world.
* I suggest you include a TBD series resistor for C3/C10. Often SPICE is somewhat optimistic with respect to phase margin and this gives some freedom in solving such an issue. This applies to the front-end as well.

I fully expect the compensation values arrived at with SPICE to be a starting point only. I did have a series resistor penned in for the compensation network in my current working copy, but I was planning to put it in series with C2/C9 rather than C3/C10, as I believed that would give me some more leeway in placing the zero without getting upper-bounded by R5/R35. Am I missing something there?

Samuel Groner said:
Do you build the prototype with all three stages or one after another?

Good question, am not entirely sure yet. On the one hand I always prefer to get as close to the final product as possible to be able to evaluate supply interaction and other inter-stage effects, on the other hand it might be useful to have separate LEGO-blocks to toy with. Hmm...

(a tea break later) I think I'll build everything on one board, including RFI rejection, Phantom caps/resistors, (optional) servoes and local power regulation. As the inputs/outputs of each gain block go to connectors or (off-board) attenuators anyway it's still easy to test each block separately, or even populate only one or two sections.

JDB.
 
Samuel Groner said:
I have a few hi-hfe NPN parts I'd like to try in the VAS.

Which ones?

Was thinking of the ROHM 2SD2226K or the 2SD2114. The latter has a rather low breakdown voltage, but for the VAS that is acceptable.

Interesting PNP parts for the input transistor position include the BCX71K and the Zetex FMMT720. The Zetex part is also available in a dual package, which will help thermal matching.

JDB.
[now pondering details like whether I should use a common-mode choke or not -- trading RFI for transformer hum pickup]
 

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