There are a few things that need addressing:
• You've forgotten to include the 10nF oscillator capacitor between pin 1 and ground of the 40106 (C1 on my schematic)
• R17 on your schematic needs to be 1M (or higher - value not critical above that value) not 470R
• R15 and R16 each need to be 27k rather than 470R.
• RV1 probably needs to be 5k rather than 3k3 - 5k pots are easier to source - (
Bourns 3386 for example )
• Pin1 of each capsule needs to go to the output of the voltage multiplier, and not to the 'half rail' . (As you have noted, that is for the FETless electret option)
(I would suggest that you take the common backplate connection to the output of the multiplier, and the 2 individual centre terminations to each of the 1G resistors. The other end of both of those resistors should go to half rail, as you have already drawn).
• R9 (470R) doesn't actually need to be there at all. I had included it to provide a test point on my original prototype, and its removal got missed!
• You've drawn the 22nF RF decoupling caps as if they are to be fitted directly to the XLR pins themselves. I know this is often recommended, but it would be very fiddly to fit 4 capacitors onto a single 5 pin XLR. I think you'll find adding them to the stripboard/PCB itself - as close to the XLR termination points as possible - will probably work just as well, and will be much simpler to fit!
• If you are keen to maximise the voltage multiplier output range, you might like to fit D3 as a15v Zener, rather than 12v?
Do remember though that the higher the voltage, the more likelihood of the capsule collapsing.... And the difference in sensitivity between - say - 70V and 80V is only likely to be 1 dB or so.
The TSC capsules you've suggested seem to be pretty 'standard' Chinese K.67 type centre terminated capsules, so should be OK with 80V.
Try adjusting for values between 60V and 80V and see how much difference you notice....